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-rw-r--r--src/mainboard/google/drallion/variants/drallion/devicetree.cb1
-rw-r--r--src/mainboard/google/hatch/variants/baseboard/devicetree.cb1
-rw-r--r--src/mainboard/google/sarien/variants/arcada/devicetree.cb1
-rw-r--r--src/mainboard/google/sarien/variants/sarien/devicetree.cb1
-rw-r--r--src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb4
5 files changed, 1 insertions, 7 deletions
diff --git a/src/mainboard/google/drallion/variants/drallion/devicetree.cb b/src/mainboard/google/drallion/variants/drallion/devicetree.cb
index aeacaa48dd..f3ce6286be 100644
--- a/src/mainboard/google/drallion/variants/drallion/devicetree.cb
+++ b/src/mainboard/google/drallion/variants/drallion/devicetree.cb
@@ -30,7 +30,6 @@ chip soc/intel/cannonlake
# FSP configuration
register "SaGv" = "SaGv_Enabled"
- register "InternalGfx" = "1"
register "SkipExtGfxScan" = "1"
register "PchPmSlpS3MinAssert" = "3" # 50ms
register "PchPmSlpS4MinAssert" = "4" # 4s
diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
index dddbca421d..01c0d234f9 100644
--- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
@@ -18,7 +18,6 @@ chip soc/intel/cannonlake
register "gen3_dec" = "0x00fc0901"
# FSP configuration
- register "InternalGfx" = "1"
register "SkipExtGfxScan" = "1"
register "SataSalpSupport" = "1"
register "SataMode" = "Sata_AHCI"
diff --git a/src/mainboard/google/sarien/variants/arcada/devicetree.cb b/src/mainboard/google/sarien/variants/arcada/devicetree.cb
index 8562046237..74529d049d 100644
--- a/src/mainboard/google/sarien/variants/arcada/devicetree.cb
+++ b/src/mainboard/google/sarien/variants/arcada/devicetree.cb
@@ -19,7 +19,6 @@ chip soc/intel/cannonlake
register "SataMode" = "Sata_AHCI"
register "SataPortsEnable[2]" = "1"
register "SataPortsDevSlp[2]" = "1"
- register "InternalGfx" = "1"
register "SkipExtGfxScan" = "1"
register "PchPmSlpS3MinAssert" = "3" # 50ms
register "PchPmSlpS4MinAssert" = "4" # 4s
diff --git a/src/mainboard/google/sarien/variants/sarien/devicetree.cb b/src/mainboard/google/sarien/variants/sarien/devicetree.cb
index 1334749542..519c3eb6d9 100644
--- a/src/mainboard/google/sarien/variants/sarien/devicetree.cb
+++ b/src/mainboard/google/sarien/variants/sarien/devicetree.cb
@@ -23,7 +23,6 @@ chip soc/intel/cannonlake
register "SataPortsDevSlp[0]" = "1"
register "SataPortsDevSlp[1]" = "1"
register "SataPortsDevSlp[2]" = "1"
- register "InternalGfx" = "1"
register "SkipExtGfxScan" = "1"
register "PchPmSlpS3MinAssert" = "3" # 50ms
register "PchPmSlpS4MinAssert" = "4" # 4s
diff --git a/src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb b/src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb
index 1bf65ff5a1..025510e7ce 100644
--- a/src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb
+++ b/src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb
@@ -161,9 +161,7 @@ chip soc/intel/cannonlake
device domain 0 on
- device pci 02.0 on # Integrated Graphics Device
- register "InternalGfx" = "1"
- end
+ device pci 02.0 on end # Integrated Graphics Device
device pci 14.3 on
chip drivers/wifi/generic
register "wake" = "PME_B0_EN_BIT"