3 files changed, 18 insertions, 0 deletions
diff --git a/src/mainboard/densitron/dpx114/Options.lb b/src/mainboard/densitron/dpx114/Options.lb
index 0b48b69260..2073c081e1 100644
--- a/src/mainboard/densitron/dpx114/Options.lb
+++ b/src/mainboard/densitron/dpx114/Options.lb
@@ -31,6 +31,7 @@ uses CROSS_COMPILE
 uses CC
 uses HOSTCC
 uses OBJCOPY
+uses CONFIG_UDELAY_IO
 
 ## ROM_SIZE is the size of boot ROM that this board will use.
 default ROM_SIZE  = 256*1024
@@ -55,6 +56,11 @@ default HAVE_MP_TABLE=0
 default HAVE_HARD_RESET=1
 
 ##
+## use io based udelay function
+##
+default CONFIG_UDELAY_IO=1
+
+##
 ## Build code to export a programmable irq routing table
 ##
 default HAVE_PIRQ_TABLE=1
diff --git a/src/mainboard/digitallogic/adl855pc/Options.lb b/src/mainboard/digitallogic/adl855pc/Options.lb
index 9549c3def7..dc85a6ff17 100644
--- a/src/mainboard/digitallogic/adl855pc/Options.lb
+++ b/src/mainboard/digitallogic/adl855pc/Options.lb
@@ -6,6 +6,7 @@ uses HAVE_HARD_RESET
 uses HAVE_OPTION_TABLE
 uses USE_OPTION_TABLE
 uses CONFIG_ROM_STREAM
+uses CONFIG_UDELAY_IO
 uses IRQ_SLOT_COUNT
 uses MAINBOARD
 uses MAINBOARD_VENDOR
@@ -59,6 +60,11 @@ default HAVE_MP_TABLE=0
 default HAVE_HARD_RESET=1
 
 ##
+## use io based udelay function
+##
+default CONFIG_UDELAY_IO=1
+
+##
 ## Build code to export a programmable irq routing table
 ##
 default HAVE_PIRQ_TABLE=1
diff --git a/src/mainboard/via/epia/Options.lb b/src/mainboard/via/epia/Options.lb
index 259acfbc24..97b5ad3859 100644
--- a/src/mainboard/via/epia/Options.lb
+++ b/src/mainboard/via/epia/Options.lb
@@ -10,6 +10,7 @@ uses HAVE_PIRQ_TABLE
 uses USE_FALLBACK_IMAGE
 uses HAVE_FALLBACK_BOOT
 uses HAVE_HARD_RESET
+uses CONFIG_UDELAY_IO
 uses HAVE_OPTION_TABLE
 uses USE_OPTION_TABLE
 uses CONFIG_ROM_STREAM
@@ -82,6 +83,11 @@ default HAVE_MP_TABLE=0
 default HAVE_HARD_RESET=1
 
 ##
+## use io based udelay function
+##
+default CONFIG_UDELAY_IO=1
+
+##
 ## Build code to export a programmable irq routing table
 ##
 default HAVE_PIRQ_TABLE=1