diff options
Diffstat (limited to 'src/mainboard')
25 files changed, 10 insertions, 30 deletions
diff --git a/src/mainboard/google/eve/devicetree.cb b/src/mainboard/google/eve/devicetree.cb index 66c1c53e2c..2f275acf07 100644 --- a/src/mainboard/google/eve/devicetree.cb +++ b/src/mainboard/google/eve/devicetree.cb @@ -46,7 +46,6 @@ chip soc/intel/skylake register "Device4Enable" = "1" register "HeciEnabled" = "0" register "SaGv" = "3" - register "SerialIrqConfigSirqEnable" = "1" register "PmConfigSlpS3MinAssert" = "2" # 50ms register "PmConfigSlpS4MinAssert" = "1" # 1s register "PmConfigSlpSusMinAssert" = "1" # 500ms diff --git a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb index 07a453d73d..bfabe2938e 100644 --- a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb @@ -81,7 +81,6 @@ chip soc/intel/skylake register "Device4Enable" = "1" register "HeciEnabled" = "0" register "SaGv" = "3" - register "SerialIrqConfigSirqEnable" = "1" register "PmConfigSlpS3MinAssert" = "2" # 50ms register "PmConfigSlpS4MinAssert" = "1" # 1s register "PmConfigSlpSusMinAssert" = "1" # 500ms diff --git a/src/mainboard/google/glados/variants/asuka/devicetree.cb b/src/mainboard/google/glados/variants/asuka/devicetree.cb index d365e8fd34..e0a792d532 100644 --- a/src/mainboard/google/glados/variants/asuka/devicetree.cb +++ b/src/mainboard/google/glados/variants/asuka/devicetree.cb @@ -38,7 +38,6 @@ chip soc/intel/skylake register "Device4Enable" = "1" register "HeciEnabled" = "0" register "SaGv" = "3" - register "SerialIrqConfigSirqEnable" = "1" register "PmConfigSlpS3MinAssert" = "2" # 50ms register "PmConfigSlpS4MinAssert" = "4" # 4s register "PmConfigSlpSusMinAssert" = "3" # 4s diff --git a/src/mainboard/google/glados/variants/caroline/devicetree.cb b/src/mainboard/google/glados/variants/caroline/devicetree.cb index cffb6df0e3..0f5a911403 100644 --- a/src/mainboard/google/glados/variants/caroline/devicetree.cb +++ b/src/mainboard/google/glados/variants/caroline/devicetree.cb @@ -48,7 +48,6 @@ chip soc/intel/skylake register "Device4Enable" = "1" register "HeciEnabled" = "0" register "SaGv" = "3" - register "SerialIrqConfigSirqEnable" = "1" register "PmConfigSlpS3MinAssert" = "2" # 50ms register "PmConfigSlpS4MinAssert" = "1" # 1s register "PmConfigSlpSusMinAssert" = "1" # 500ms diff --git a/src/mainboard/google/glados/variants/cave/devicetree.cb b/src/mainboard/google/glados/variants/cave/devicetree.cb index e0c7fc7ed6..a9b28a8abc 100644 --- a/src/mainboard/google/glados/variants/cave/devicetree.cb +++ b/src/mainboard/google/glados/variants/cave/devicetree.cb @@ -48,7 +48,6 @@ chip soc/intel/skylake register "Device4Enable" = "1" register "HeciEnabled" = "0" register "SaGv" = "3" - register "SerialIrqConfigSirqEnable" = "1" register "PmConfigSlpS3MinAssert" = "2" # 50ms register "PmConfigSlpS4MinAssert" = "1" # 1s register "PmConfigSlpSusMinAssert" = "1" # 500ms diff --git a/src/mainboard/google/glados/variants/chell/devicetree.cb b/src/mainboard/google/glados/variants/chell/devicetree.cb index 1b87cca93e..07467b3699 100644 --- a/src/mainboard/google/glados/variants/chell/devicetree.cb +++ b/src/mainboard/google/glados/variants/chell/devicetree.cb @@ -48,7 +48,6 @@ chip soc/intel/skylake register "Device4Enable" = "1" register "HeciEnabled" = "0" register "SaGv" = "3" - register "SerialIrqConfigSirqEnable" = "1" register "PmConfigSlpS3MinAssert" = "2" # 50ms register "PmConfigSlpS4MinAssert" = "1" # 1s register "PmConfigSlpSusMinAssert" = "1" # 500ms diff --git a/src/mainboard/google/glados/variants/glados/devicetree.cb b/src/mainboard/google/glados/variants/glados/devicetree.cb index f4e09a6b7d..d4266cc4fe 100644 --- a/src/mainboard/google/glados/variants/glados/devicetree.cb +++ b/src/mainboard/google/glados/variants/glados/devicetree.cb @@ -48,7 +48,6 @@ chip soc/intel/skylake register "Device4Enable" = "1" register "HeciEnabled" = "0" register "SaGv" = "3" - register "SerialIrqConfigSirqEnable" = "1" register "PmConfigSlpS3MinAssert" = "2" # 50ms register "PmConfigSlpS4MinAssert" = "1" # 1s register "PmConfigSlpSusMinAssert" = "1" # 500ms diff --git a/src/mainboard/google/glados/variants/lars/devicetree.cb b/src/mainboard/google/glados/variants/lars/devicetree.cb index 56087ad1f0..f3f5eab2e9 100644 --- a/src/mainboard/google/glados/variants/lars/devicetree.cb +++ b/src/mainboard/google/glados/variants/lars/devicetree.cb @@ -36,7 +36,6 @@ chip soc/intel/skylake register "Device4Enable" = "1" register "HeciEnabled" = "0" register "SaGv" = "3" - register "SerialIrqConfigSirqEnable" = "1" register "PmConfigSlpS3MinAssert" = "2" # 50ms register "PmConfigSlpS4MinAssert" = "4" # 4s register "PmConfigSlpSusMinAssert" = "3" # 4s diff --git a/src/mainboard/google/glados/variants/sentry/devicetree.cb b/src/mainboard/google/glados/variants/sentry/devicetree.cb index 0effbd73c8..5cce0f01f8 100644 --- a/src/mainboard/google/glados/variants/sentry/devicetree.cb +++ b/src/mainboard/google/glados/variants/sentry/devicetree.cb @@ -38,7 +38,6 @@ chip soc/intel/skylake register "Device4Enable" = "1" register "HeciEnabled" = "0" register "SaGv" = "3" - register "SerialIrqConfigSirqEnable" = "1" register "PmConfigSlpS3MinAssert" = "2" # 50ms register "PmConfigSlpS4MinAssert" = "4" # 4s register "PmConfigSlpSusMinAssert" = "3" # 4s diff --git a/src/mainboard/google/poppy/variants/atlas/devicetree.cb b/src/mainboard/google/poppy/variants/atlas/devicetree.cb index 380c747739..87d73486e3 100644 --- a/src/mainboard/google/poppy/variants/atlas/devicetree.cb +++ b/src/mainboard/google/poppy/variants/atlas/devicetree.cb @@ -54,7 +54,6 @@ chip soc/intel/skylake register "Device4Enable" = "1" register "HeciEnabled" = "0" register "SaGv" = "3" - register "SerialIrqConfigSirqEnable" = "1" register "PmConfigSlpS3MinAssert" = "2" # 50ms register "PmConfigSlpS4MinAssert" = "1" # 1s register "PmConfigSlpSusMinAssert" = "1" # 500ms diff --git a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb index 251cab8a88..7335c0a0fb 100644 --- a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb @@ -51,7 +51,6 @@ chip soc/intel/skylake register "Device4Enable" = "1" register "HeciEnabled" = "0" register "SaGv" = "3" - register "SerialIrqConfigSirqEnable" = "1" register "PmConfigSlpS3MinAssert" = "2" # 50ms register "PmConfigSlpS4MinAssert" = "1" # 1s register "PmConfigSlpSusMinAssert" = "1" # 500ms diff --git a/src/mainboard/google/poppy/variants/nami/devicetree.cb b/src/mainboard/google/poppy/variants/nami/devicetree.cb index 5d9c096c05..59cca29d9c 100644 --- a/src/mainboard/google/poppy/variants/nami/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nami/devicetree.cb @@ -50,7 +50,6 @@ chip soc/intel/skylake register "Device4Enable" = "1" register "HeciEnabled" = "0" register "SaGv" = "3" - register "SerialIrqConfigSirqEnable" = "1" register "PmConfigSlpS3MinAssert" = "2" # 50ms register "PmConfigSlpS4MinAssert" = "1" # 1s register "PmConfigSlpSusMinAssert" = "1" # 500ms diff --git a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb index 75a01c2541..fed85b6144 100644 --- a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb @@ -51,7 +51,6 @@ chip soc/intel/skylake register "Device4Enable" = "1" register "HeciEnabled" = "0" register "SaGv" = "3" - register "SerialIrqConfigSirqEnable" = "1" register "PmConfigSlpS3MinAssert" = "2" # 50ms register "PmConfigSlpS4MinAssert" = "1" # 1s register "PmConfigSlpSusMinAssert" = "1" # 500ms diff --git a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb index 4d9403c92b..ac52208fcb 100644 --- a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb @@ -56,7 +56,6 @@ chip soc/intel/skylake register "Device4Enable" = "1" register "HeciEnabled" = "0" register "SaGv" = "3" - register "SerialIrqConfigSirqEnable" = "1" register "PmConfigSlpS3MinAssert" = "2" # 50ms register "PmConfigSlpS4MinAssert" = "1" # 1s register "PmConfigSlpSusMinAssert" = "1" # 500ms diff --git a/src/mainboard/google/poppy/variants/rammus/devicetree.cb b/src/mainboard/google/poppy/variants/rammus/devicetree.cb index c8e4008fd1..4f58f40629 100644 --- a/src/mainboard/google/poppy/variants/rammus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/rammus/devicetree.cb @@ -54,7 +54,6 @@ chip soc/intel/skylake register "Device4Enable" = "1" register "HeciEnabled" = "0" register "SaGv" = "3" - register "SerialIrqConfigSirqEnable" = "1" register "PmConfigSlpS3MinAssert" = "2" # 50ms register "PmConfigSlpS4MinAssert" = "1" # 1s register "PmConfigSlpSusMinAssert" = "1" # 500ms diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb index 4713a816ac..d813cc174f 100644 --- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb +++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb @@ -51,7 +51,6 @@ chip soc/intel/skylake register "Device4Enable" = "1" register "HeciEnabled" = "0" register "SaGv" = "3" - register "SerialIrqConfigSirqEnable" = "1" register "PmConfigSlpS3MinAssert" = "2" # 50ms register "PmConfigSlpS4MinAssert" = "1" # 1s register "PmConfigSlpSusMinAssert" = "1" # 500ms diff --git a/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb b/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb index 51399dc80f..fcd5aabf88 100644 --- a/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb +++ b/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb @@ -54,8 +54,6 @@ chip soc/intel/skylake # SLP_A Minimum Assertion Width. Values 0: 0ms, 1: 4s, 2: 98ms, 3: 2s register "PmConfigSlpAMinAssert" = "0x03" - # Determines if enable Serial IRQ. Values 0: Disabled, 1: Enabled - register "SerialIrqConfigSirqEnable" = "0x01" # VR Settings Configuration for 4 Domains #+----------------+-------+-------+-------+-------+ diff --git a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb index 119767f48a..436a4ed7d4 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb @@ -11,7 +11,7 @@ chip soc/intel/skylake register "Heci3Enabled" = "0" register "PmTimerDisabled" = "0" - register "SerialIrqConfigSirqMode" = "0x01" + register "serirq_mode" = "SERIRQ_CONTINUOUS" # Enable PCIE slot register "PcieRpEnable[5]" = "1" diff --git a/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb index 9753c64e26..8dbaf685a8 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb @@ -10,7 +10,8 @@ chip soc/intel/skylake register "ScsSdCardEnabled" = "0" register "HeciEnabled" = "0" register "PmTimerDisabled" = "0" - register "SerialIrqConfigSirqMode" = "0x01" + + register "serirq_mode" = "SERIRQ_CONTINUOUS" # VR Settings Configuration for 5 Domains #+----------------+-------+-------+-------------+-------------+-------+ diff --git a/src/mainboard/intel/kunimitsu/devicetree.cb b/src/mainboard/intel/kunimitsu/devicetree.cb index 4b720bf88b..ec1c11f1fb 100644 --- a/src/mainboard/intel/kunimitsu/devicetree.cb +++ b/src/mainboard/intel/kunimitsu/devicetree.cb @@ -60,8 +60,6 @@ chip soc/intel/skylake # SLP_A Minimum Assertion Width. Values 0: 0ms, 1: 4s, 2: 98ms, 3: 2s register "PmConfigSlpAMinAssert" = "0x03" - # Determines if enable Serial IRQ. Values 0: Disabled, 1: Enabled - register "SerialIrqConfigSirqEnable" = "0x01" # VR Settings Configuration for 5 Domains #+----------------+-------+-------+-------------+-------------+-------+ diff --git a/src/mainboard/intel/saddlebrook/Kconfig b/src/mainboard/intel/saddlebrook/Kconfig index 197121eb95..524bcca011 100644 --- a/src/mainboard/intel/saddlebrook/Kconfig +++ b/src/mainboard/intel/saddlebrook/Kconfig @@ -25,7 +25,6 @@ config BOARD_SPECIFIC_OPTIONS select HAVE_ACPI_TABLES select HAVE_OPTION_TABLE select INTEL_LPSS_UART_FOR_CONSOLE - select SERIRQ_CONTINUOUS_MODE select SKYLAKE_SOC_PCH_H select SOC_INTEL_SKYLAKE select SUPERIO_NUVOTON_NCT6776 diff --git a/src/mainboard/intel/saddlebrook/devicetree.cb b/src/mainboard/intel/saddlebrook/devicetree.cb index 7036b28f2d..8f78249b3b 100644 --- a/src/mainboard/intel/saddlebrook/devicetree.cb +++ b/src/mainboard/intel/saddlebrook/devicetree.cb @@ -60,9 +60,7 @@ chip soc/intel/skylake # SLP_A Minimum Assertion Width. Values 0: 0ms, 1: 4s, 2: 98ms, 3: 2s register "PmConfigSlpAMinAssert" = "0x03" - # Determines if enable Serial IRQ. Values 0: Disabled, 1: Enabled - register "SerialIrqConfigSirqEnable" = "0x01" - register "SerialIrqConfigSirqMode" = "0x01" + register "serirq_mode" = "SERIRQ_CONTINUOUS" # VR Settings Configuration for 5 Domains #+----------------+-------+-------+-------------+-------------+-------+ diff --git a/src/mainboard/purism/librem_skl/Kconfig b/src/mainboard/purism/librem_skl/Kconfig index b3413b73d5..965318f565 100644 --- a/src/mainboard/purism/librem_skl/Kconfig +++ b/src/mainboard/purism/librem_skl/Kconfig @@ -6,8 +6,6 @@ config BOARD_PURISM_BASEBOARD_LIBREM_SKL select HAVE_ACPI_TABLES select INTEL_LPSS_UART_FOR_CONSOLE select SOC_INTEL_SKYLAKE - # Workaround for EC/KBC IRQ1 - select SERIRQ_CONTINUOUS_MODE select MAINBOARD_USES_FSP2_0 select SPD_READ_BY_WORD select MAINBOARD_HAS_LPC_TPM diff --git a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb index 399c6432a1..8d2a436a5a 100644 --- a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb +++ b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb @@ -61,13 +61,15 @@ chip soc/intel/skylake register "Device4Enable" = "1" register "HeciEnabled" = "0" register "SaGv" = "3" - register "SerialIrqConfigSirqEnable" = "1" register "PmConfigSlpS3MinAssert" = "2" # 50ms register "PmConfigSlpS4MinAssert" = "1" # 1s register "PmConfigSlpSusMinAssert" = "3" # 500ms register "PmConfigSlpAMinAssert" = "3" # 2s register "PmTimerDisabled" = "0" + # EC/KBC requires continuous mode + register "serirq_mode" = "SERIRQ_CONTINUOUS" + register "pirqa_routing" = "PCH_IRQ11" register "pirqb_routing" = "PCH_IRQ10" register "pirqc_routing" = "PCH_IRQ11" diff --git a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb index f9f7ef7e53..49af7b69f1 100644 --- a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb +++ b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb @@ -61,13 +61,15 @@ chip soc/intel/skylake register "Device4Enable" = "1" register "HeciEnabled" = "0" register "SaGv" = "3" - register "SerialIrqConfigSirqEnable" = "1" register "PmConfigSlpS3MinAssert" = "2" # 50ms register "PmConfigSlpS4MinAssert" = "1" # 1s register "PmConfigSlpSusMinAssert" = "3" # 500ms register "PmConfigSlpAMinAssert" = "3" # 2s register "PmTimerDisabled" = "0" + # EC/KBC requires continuous mode + register "serirq_mode" = "SERIRQ_CONTINUOUS" + register "pirqa_routing" = "PCH_IRQ11" register "pirqb_routing" = "PCH_IRQ10" register "pirqc_routing" = "PCH_IRQ11" |