diff options
Diffstat (limited to 'src/mainboard')
69 files changed, 0 insertions, 122 deletions
diff --git a/src/mainboard/google/auron/mainboard.c b/src/mainboard/google/auron/mainboard.c index 371d91e8af..050d9cd54d 100644 --- a/src/mainboard/google/auron/mainboard.c +++ b/src/mainboard/google/auron/mainboard.c @@ -5,7 +5,6 @@ #include "ec.h" #include "variant.h" - __weak void lan_init(void) { } diff --git a/src/mainboard/google/auron/variants/lulu/spd/spd.c b/src/mainboard/google/auron/variants/lulu/spd/spd.c index 0daf308922..750470e89c 100644 --- a/src/mainboard/google/auron/variants/lulu/spd/spd.c +++ b/src/mainboard/google/auron/variants/lulu/spd/spd.c @@ -104,7 +104,6 @@ void mainboard_fill_spd_data(struct pei_data *pei_data) if (spd_file_len < SPD_LEN) die("Missing SPD data."); - /* CH0 */ memcpy(pei_data->spd_data[0][0], spd_file + (spd_index * SPD_LEN), SPD_LEN); diff --git a/src/mainboard/google/beltino/mainboard.c b/src/mainboard/google/beltino/mainboard.c index e87f431494..7eba3c2c2f 100644 --- a/src/mainboard/google/beltino/mainboard.c +++ b/src/mainboard/google/beltino/mainboard.c @@ -14,8 +14,6 @@ void mainboard_suspend_resume(void) apm_control(APM_CNT_FINALIZE); } - - static void mainboard_init(struct device *dev) { lan_init(); diff --git a/src/mainboard/google/butterfly/acpi_tables.c b/src/mainboard/google/butterfly/acpi_tables.c index 7ac37b2d46..315fd6d7bb 100644 --- a/src/mainboard/google/butterfly/acpi_tables.c +++ b/src/mainboard/google/butterfly/acpi_tables.c @@ -15,7 +15,6 @@ void acpi_create_gnvs(struct global_nvs *gnvs) gnvs->s5u0 = 0; gnvs->s5u1 = 0; - // TODO: MLR // The firmware read/write status is a "virtual" switch and // will be handled elsewhere. Until then hard-code to diff --git a/src/mainboard/google/butterfly/mainboard.c b/src/mainboard/google/butterfly/mainboard.c index fc38136015..d2e2aa552a 100644 --- a/src/mainboard/google/butterfly/mainboard.c +++ b/src/mainboard/google/butterfly/mainboard.c @@ -153,7 +153,6 @@ static void program_keyboard_type(u32 search_address, u32 search_length) } else printk(BIOS_DEBUG, "Error: Could not locate VPD area\n"); - printk(BIOS_DEBUG, "Setting Keyboard type in EC to "); printk(BIOS_DEBUG, (kbd_type == EC_KBD_JP) ? "Japanese" : "English"); printk(BIOS_DEBUG, ".\n"); diff --git a/src/mainboard/google/cyan/acpi/codec_maxim.asl b/src/mainboard/google/cyan/acpi/codec_maxim.asl index 240baca958..e85e93775c 100644 --- a/src/mainboard/google/cyan/acpi/codec_maxim.asl +++ b/src/mainboard/google/cyan/acpi/codec_maxim.asl @@ -88,7 +88,6 @@ Scope (\_SB.PCI0.I2C2) } } - Scope (\_SB.PCI0.LPEA) { Name (GBUF, ResourceTemplate () diff --git a/src/mainboard/google/cyan/mainboard.c b/src/mainboard/google/cyan/mainboard.c index 17f14a29a1..b8266b31dc 100644 --- a/src/mainboard/google/cyan/mainboard.c +++ b/src/mainboard/google/cyan/mainboard.c @@ -19,7 +19,6 @@ static void mainboard_enable(struct device *dev) dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; } - struct chip_operations mainboard_ops = { .enable_dev = mainboard_enable, }; diff --git a/src/mainboard/google/cyan/variants/banon/gpio.c b/src/mainboard/google/cyan/variants/banon/gpio.c index 6bc9e82dd3..b2d1cbe355 100644 --- a/src/mainboard/google/cyan/variants/banon/gpio.c +++ b/src/mainboard/google/cyan/variants/banon/gpio.c @@ -64,7 +64,6 @@ static const struct soc_gpio_map gpse_gpio_map[] = { GPIO_END }; - /* South West Community */ static const struct soc_gpio_map gpsw_gpio_map[] = { GPIO_NC, /* 00 FST_SPI_D2 */ @@ -129,7 +128,6 @@ static const struct soc_gpio_map gpsw_gpio_map[] = { GPIO_END }; - /* North Community */ static const struct soc_gpio_map gpn_gpio_map[] = { GPIO_NC, /* 00 GPIO_DFX0 */ @@ -199,7 +197,6 @@ static const struct soc_gpio_map gpn_gpio_map[] = { GPIO_END }; - /* East Community */ static const struct soc_gpio_map gpe_gpio_map[] = { Native_M1, /* 00 PMU_SLP_S3_B */ @@ -229,7 +226,6 @@ static const struct soc_gpio_map gpe_gpio_map[] = { GPIO_END }; - static struct soc_gpio_config gpio_config = { /* BSW */ .north = gpn_gpio_map, diff --git a/src/mainboard/google/cyan/variants/banon/include/variant/acpi/dptf.asl b/src/mainboard/google/cyan/variants/banon/include/variant/acpi/dptf.asl index 2cb4bf392d..e9d7524305 100644 --- a/src/mainboard/google/cyan/variants/banon/include/variant/acpi/dptf.asl +++ b/src/mainboard/google/cyan/variants/banon/include/variant/acpi/dptf.asl @@ -5,7 +5,6 @@ #define DPTF_TSR0_PASSIVE 46 #define DPTF_TSR0_CRITICAL 60 - #define DPTF_TSR1_SENSOR_ID 1 #define DPTF_TSR1_SENSOR_NAME "TMP432_CPU_bottom" #define DPTF_TSR1_PASSIVE 48 @@ -16,7 +15,6 @@ #define DPTF_TSR2_PASSIVE 68 #define DPTF_TSR2_CRITICAL 80 - #define DPTF_ENABLE_CHARGER /* Charger performance states, board-specific values from charger and EC */ diff --git a/src/mainboard/google/cyan/variants/celes/gpio.c b/src/mainboard/google/cyan/variants/celes/gpio.c index 62ee365ef4..b385ad7c8d 100644 --- a/src/mainboard/google/cyan/variants/celes/gpio.c +++ b/src/mainboard/google/cyan/variants/celes/gpio.c @@ -66,7 +66,6 @@ static const struct soc_gpio_map gpse_gpio_map[] = { GPIO_END }; - /* South West Community */ static const struct soc_gpio_map gpsw_gpio_map[] = { GPIO_NC, /* 00 FST_SPI_D2 */ @@ -132,7 +131,6 @@ static const struct soc_gpio_map gpsw_gpio_map[] = { GPIO_END }; - /* North Community */ static const struct soc_gpio_map gpn_gpio_map[] = { GPIO_NC, /* 00 GPIO_DFX0 */ @@ -202,7 +200,6 @@ static const struct soc_gpio_map gpn_gpio_map[] = { GPIO_END }; - /* East Community */ static const struct soc_gpio_map gpe_gpio_map[] = { Native_M1, /* 00 PMU_SLP_S3_B */ @@ -232,7 +229,6 @@ static const struct soc_gpio_map gpe_gpio_map[] = { GPIO_END }; - static struct soc_gpio_config gpio_config = { /* BSW */ .north = gpn_gpio_map, diff --git a/src/mainboard/google/cyan/variants/cyan/gpio.c b/src/mainboard/google/cyan/variants/cyan/gpio.c index 8eee5cbf7b..9491c25d99 100644 --- a/src/mainboard/google/cyan/variants/cyan/gpio.c +++ b/src/mainboard/google/cyan/variants/cyan/gpio.c @@ -64,7 +64,6 @@ static const struct soc_gpio_map gpse_gpio_map[] = { GPIO_END }; - /* South West Community */ static const struct soc_gpio_map gpsw_gpio_map[] = { GPIO_NC, /* 00 FST_SPI_D2 */ @@ -132,7 +131,6 @@ static const struct soc_gpio_map gpsw_gpio_map[] = { GPIO_END }; - /* North Community */ static const struct soc_gpio_map gpn_gpio_map[] = { GPIO_NC, /* 00 GPIO_DFX0 */ @@ -202,7 +200,6 @@ static const struct soc_gpio_map gpn_gpio_map[] = { GPIO_END }; - /* East Community */ static const struct soc_gpio_map gpe_gpio_map[] = { Native_M1, /* 00 PMU_SLP_S3_B */ @@ -232,7 +229,6 @@ static const struct soc_gpio_map gpe_gpio_map[] = { GPIO_END }; - static struct soc_gpio_config gpio_config = { /* BSW */ .north = gpn_gpio_map, diff --git a/src/mainboard/google/cyan/variants/cyan/include/variant/onboard.h b/src/mainboard/google/cyan/variants/cyan/include/variant/onboard.h index 3482e95ede..06c61f21e7 100644 --- a/src/mainboard/google/cyan/variants/cyan/include/variant/onboard.h +++ b/src/mainboard/google/cyan/variants/cyan/include/variant/onboard.h @@ -39,7 +39,6 @@ #define BOARD_TOUCHSCREEN_I2C_BUS 0 #define BOARD_TOUCHSCREEN_I2C_ADDR 0x10 - /* SD CARD gpio */ #define SDCARD_CD 81 diff --git a/src/mainboard/google/cyan/variants/edgar/gpio.c b/src/mainboard/google/cyan/variants/edgar/gpio.c index f327e159dd..c1b43b88ec 100644 --- a/src/mainboard/google/cyan/variants/edgar/gpio.c +++ b/src/mainboard/google/cyan/variants/edgar/gpio.c @@ -64,7 +64,6 @@ static const struct soc_gpio_map gpse_gpio_map[] = { GPIO_END }; - /* South West Community */ static const struct soc_gpio_map gpsw_gpio_map[] = { GPIO_NC, /* 00 FST_SPI_D2 */ @@ -129,7 +128,6 @@ static const struct soc_gpio_map gpsw_gpio_map[] = { GPIO_END }; - /* North Community */ static const struct soc_gpio_map gpn_gpio_map[] = { GPIO_NC, /* 00 GPIO_DFX0 */ @@ -197,7 +195,6 @@ static const struct soc_gpio_map gpn_gpio_map[] = { GPIO_END }; - /* East Community */ static const struct soc_gpio_map gpe_gpio_map[] = { Native_M1, /* 00 PMU_SLP_S3_B */ @@ -227,7 +224,6 @@ static const struct soc_gpio_map gpe_gpio_map[] = { GPIO_END }; - static struct soc_gpio_config gpio_config = { /* BSW */ .north = gpn_gpio_map, diff --git a/src/mainboard/google/cyan/variants/edgar/include/variant/acpi/dptf.asl b/src/mainboard/google/cyan/variants/edgar/include/variant/acpi/dptf.asl index bbdcfc7d34..b261570ca8 100644 --- a/src/mainboard/google/cyan/variants/edgar/include/variant/acpi/dptf.asl +++ b/src/mainboard/google/cyan/variants/edgar/include/variant/acpi/dptf.asl @@ -5,7 +5,6 @@ #define DPTF_TSR0_PASSIVE 45 #define DPTF_TSR0_CRITICAL 75 - #define DPTF_TSR1_SENSOR_ID 2 #define DPTF_TSR1_SENSOR_NAME "R4303_CPU" #define DPTF_TSR1_PASSIVE 49 @@ -16,7 +15,6 @@ #define DPTF_TSR2_PASSIVE 49 #define DPTF_TSR2_CRITICAL 70 - #define DPTF_ENABLE_CHARGER /* Charger performance states, board-specific values from charger and EC */ diff --git a/src/mainboard/google/cyan/variants/kefka/gpio.c b/src/mainboard/google/cyan/variants/kefka/gpio.c index 1f121048f5..4e4b01a5c1 100644 --- a/src/mainboard/google/cyan/variants/kefka/gpio.c +++ b/src/mainboard/google/cyan/variants/kefka/gpio.c @@ -64,7 +64,6 @@ static const struct soc_gpio_map gpse_gpio_map[] = { GPIO_END }; - /* South West Community */ static const struct soc_gpio_map gpsw_gpio_map[] = { GPIO_NC, /* 00 FST_SPI_D2 */ @@ -128,7 +127,6 @@ static const struct soc_gpio_map gpsw_gpio_map[] = { GPIO_END }; - /* North Community */ static const struct soc_gpio_map gpn_gpio_map[] = { GPIO_NC, /* 00 GPIO_DFX0 */ @@ -197,7 +195,6 @@ static const struct soc_gpio_map gpn_gpio_map[] = { GPIO_END }; - /* East Community */ static const struct soc_gpio_map gpe_gpio_map[] = { Native_M1, /* 00 PMU_SLP_S3_B */ @@ -227,7 +224,6 @@ static const struct soc_gpio_map gpe_gpio_map[] = { GPIO_END }; - static struct soc_gpio_config gpio_config = { /* BSW */ .north = gpn_gpio_map, diff --git a/src/mainboard/google/cyan/variants/kefka/include/variant/acpi/dptf.asl b/src/mainboard/google/cyan/variants/kefka/include/variant/acpi/dptf.asl index ca3415182e..5bf3322906 100644 --- a/src/mainboard/google/cyan/variants/kefka/include/variant/acpi/dptf.asl +++ b/src/mainboard/google/cyan/variants/kefka/include/variant/acpi/dptf.asl @@ -5,7 +5,6 @@ #define DPTF_TSR0_PASSIVE 55 #define DPTF_TSR0_CRITICAL 68 - #define DPTF_TSR1_SENSOR_ID 1 #define DPTF_TSR1_SENSOR_NAME "TMP432_Power_top" #define DPTF_TSR1_PASSIVE 55 @@ -16,7 +15,6 @@ #define DPTF_TSR2_PASSIVE 53 #define DPTF_TSR2_CRITICAL 66 - #define DPTF_ENABLE_CHARGER /* Charger performance states, board-specific values from charger and EC */ diff --git a/src/mainboard/google/cyan/variants/reks/gpio.c b/src/mainboard/google/cyan/variants/reks/gpio.c index ecc5c54d95..ece6c8058d 100644 --- a/src/mainboard/google/cyan/variants/reks/gpio.c +++ b/src/mainboard/google/cyan/variants/reks/gpio.c @@ -64,7 +64,6 @@ static const struct soc_gpio_map gpse_gpio_map[] = { GPIO_END }; - /* South West Community */ static const struct soc_gpio_map gpsw_gpio_map[] = { GPIO_NC, /* 00 FST_SPI_D2 */ @@ -131,7 +130,6 @@ static const struct soc_gpio_map gpsw_gpio_map[] = { GPIO_END }; - /* North Community */ static const struct soc_gpio_map gpn_gpio_map[] = { GPIO_NC, /* 00 GPIO_DFX0 */ @@ -201,7 +199,6 @@ static const struct soc_gpio_map gpn_gpio_map[] = { GPIO_END }; - /* East Community */ static const struct soc_gpio_map gpe_gpio_map[] = { Native_M1, /* 00 PMU_SLP_S3_B */ @@ -231,7 +228,6 @@ static const struct soc_gpio_map gpe_gpio_map[] = { GPIO_END }; - static struct soc_gpio_config gpio_config = { /* BSW */ .north = gpn_gpio_map, diff --git a/src/mainboard/google/cyan/variants/reks/include/variant/acpi/dptf.asl b/src/mainboard/google/cyan/variants/reks/include/variant/acpi/dptf.asl index 554e129905..df393b95e4 100644 --- a/src/mainboard/google/cyan/variants/reks/include/variant/acpi/dptf.asl +++ b/src/mainboard/google/cyan/variants/reks/include/variant/acpi/dptf.asl @@ -5,7 +5,6 @@ #define DPTF_TSR0_PASSIVE 49 #define DPTF_TSR0_CRITICAL 70 - #define DPTF_TSR1_SENSOR_ID 1 #define DPTF_TSR1_SENSOR_NAME "TMP432_Charger" #define DPTF_TSR1_PASSIVE 65 @@ -16,7 +15,6 @@ #define DPTF_TSR2_PASSIVE 48 #define DPTF_TSR2_CRITICAL 70 - #define DPTF_ENABLE_CHARGER /* Charger performance states, board-specific values from charger and EC */ diff --git a/src/mainboard/google/cyan/variants/relm/gpio.c b/src/mainboard/google/cyan/variants/relm/gpio.c index fca36bbaef..5a0c13a6a3 100644 --- a/src/mainboard/google/cyan/variants/relm/gpio.c +++ b/src/mainboard/google/cyan/variants/relm/gpio.c @@ -64,7 +64,6 @@ static const struct soc_gpio_map gpse_gpio_map[] = { GPIO_END }; - /* South West Community */ static const struct soc_gpio_map gpsw_gpio_map[] = { GPIO_NC, /* 00 FST_SPI_D2 */ @@ -131,7 +130,6 @@ static const struct soc_gpio_map gpsw_gpio_map[] = { GPIO_END }; - /* North Community */ static const struct soc_gpio_map gpn_gpio_map[] = { GPIO_NC, /* 00 GPIO_DFX0 */ @@ -201,7 +199,6 @@ static const struct soc_gpio_map gpn_gpio_map[] = { GPIO_END }; - /* East Community */ static const struct soc_gpio_map gpe_gpio_map[] = { Native_M1, /* 00 PMU_SLP_S3_B */ @@ -231,7 +228,6 @@ static const struct soc_gpio_map gpe_gpio_map[] = { GPIO_END }; - static struct soc_gpio_config gpio_config = { /* BSW */ .north = gpn_gpio_map, diff --git a/src/mainboard/google/cyan/variants/relm/include/variant/acpi/dptf.asl b/src/mainboard/google/cyan/variants/relm/include/variant/acpi/dptf.asl index 554e129905..df393b95e4 100644 --- a/src/mainboard/google/cyan/variants/relm/include/variant/acpi/dptf.asl +++ b/src/mainboard/google/cyan/variants/relm/include/variant/acpi/dptf.asl @@ -5,7 +5,6 @@ #define DPTF_TSR0_PASSIVE 49 #define DPTF_TSR0_CRITICAL 70 - #define DPTF_TSR1_SENSOR_ID 1 #define DPTF_TSR1_SENSOR_NAME "TMP432_Charger" #define DPTF_TSR1_PASSIVE 65 @@ -16,7 +15,6 @@ #define DPTF_TSR2_PASSIVE 48 #define DPTF_TSR2_CRITICAL 70 - #define DPTF_ENABLE_CHARGER /* Charger performance states, board-specific values from charger and EC */ diff --git a/src/mainboard/google/cyan/variants/setzer/gpio.c b/src/mainboard/google/cyan/variants/setzer/gpio.c index 7938855d75..cdf57a447b 100644 --- a/src/mainboard/google/cyan/variants/setzer/gpio.c +++ b/src/mainboard/google/cyan/variants/setzer/gpio.c @@ -64,7 +64,6 @@ static const struct soc_gpio_map gpse_gpio_map[] = { GPIO_END }; - /* South West Community */ static const struct soc_gpio_map gpsw_gpio_map[] = { GPIO_NC, /* 00 FST_SPI_D2 */ @@ -129,7 +128,6 @@ static const struct soc_gpio_map gpsw_gpio_map[] = { GPIO_END }; - /* North Community */ static const struct soc_gpio_map gpn_gpio_map[] = { GPIO_NC, /* 00 GPIO_DFX0 */ @@ -199,7 +197,6 @@ static const struct soc_gpio_map gpn_gpio_map[] = { GPIO_END }; - /* East Community */ static const struct soc_gpio_map gpe_gpio_map[] = { Native_M1, /* 00 PMU_SLP_S3_B */ @@ -229,7 +226,6 @@ static const struct soc_gpio_map gpe_gpio_map[] = { GPIO_END }; - static struct soc_gpio_config gpio_config = { /* BSW */ .north = gpn_gpio_map, diff --git a/src/mainboard/google/cyan/variants/setzer/include/variant/acpi/dptf.asl b/src/mainboard/google/cyan/variants/setzer/include/variant/acpi/dptf.asl index dbc3d42f31..bebc11dfcc 100644 --- a/src/mainboard/google/cyan/variants/setzer/include/variant/acpi/dptf.asl +++ b/src/mainboard/google/cyan/variants/setzer/include/variant/acpi/dptf.asl @@ -5,7 +5,6 @@ #define DPTF_TSR0_PASSIVE 58 #define DPTF_TSR0_CRITICAL 66 - #define DPTF_TSR1_SENSOR_ID 1 #define DPTF_TSR1_SENSOR_NAME "TMP432_Power_top" #define DPTF_TSR1_PASSIVE 57 @@ -16,7 +15,6 @@ #define DPTF_TSR2_PASSIVE 59 #define DPTF_TSR2_CRITICAL 66 - #define DPTF_ENABLE_CHARGER /* Charger performance states, board-specific values from charger and EC */ diff --git a/src/mainboard/google/cyan/variants/terra/gpio.c b/src/mainboard/google/cyan/variants/terra/gpio.c index 4b970b2631..11071eb560 100644 --- a/src/mainboard/google/cyan/variants/terra/gpio.c +++ b/src/mainboard/google/cyan/variants/terra/gpio.c @@ -64,7 +64,6 @@ static const struct soc_gpio_map gpse_gpio_map[] = { GPIO_END }; - /* South West Community */ static const struct soc_gpio_map gpsw_gpio_map[] = { GPIO_NC, /* 00 FST_SPI_D2 */ @@ -128,7 +127,6 @@ static const struct soc_gpio_map gpsw_gpio_map[] = { GPIO_END }; - /* North Community */ static const struct soc_gpio_map gpn_gpio_map[] = { GPIO_NC, /* 00 GPIO_DFX0 */ @@ -197,7 +195,6 @@ static const struct soc_gpio_map gpn_gpio_map[] = { GPIO_END }; - /* East Community */ static const struct soc_gpio_map gpe_gpio_map[] = { Native_M1, /* 00 PMU_SLP_S3_B */ @@ -227,7 +224,6 @@ static const struct soc_gpio_map gpe_gpio_map[] = { GPIO_END }; - static struct soc_gpio_config gpio_config = { /* BSW */ .north = gpn_gpio_map, diff --git a/src/mainboard/google/cyan/variants/ultima/gpio.c b/src/mainboard/google/cyan/variants/ultima/gpio.c index 741b73e986..cef45aa609 100644 --- a/src/mainboard/google/cyan/variants/ultima/gpio.c +++ b/src/mainboard/google/cyan/variants/ultima/gpio.c @@ -64,7 +64,6 @@ static const struct soc_gpio_map gpse_gpio_map[] = { GPIO_END }; - /* South West Community */ static const struct soc_gpio_map gpsw_gpio_map[] = { GPIO_NC, /* 00 FST_SPI_D2 */ @@ -131,7 +130,6 @@ static const struct soc_gpio_map gpsw_gpio_map[] = { GPIO_END }; - /* North Community */ static const struct soc_gpio_map gpn_gpio_map[] = { GPIO_NC, /* 00 GPIO_DFX0 */ @@ -201,7 +199,6 @@ static const struct soc_gpio_map gpn_gpio_map[] = { GPIO_END }; - /* East Community */ static const struct soc_gpio_map gpe_gpio_map[] = { Native_M1, /* 00 PMU_SLP_S3_B */ @@ -231,7 +228,6 @@ static const struct soc_gpio_map gpe_gpio_map[] = { GPIO_END }; - static struct soc_gpio_config gpio_config = { /* BSW */ .north = gpn_gpio_map, diff --git a/src/mainboard/google/cyan/variants/ultima/include/variant/acpi/dptf.asl b/src/mainboard/google/cyan/variants/ultima/include/variant/acpi/dptf.asl index 095a538d9e..40230f09e2 100644 --- a/src/mainboard/google/cyan/variants/ultima/include/variant/acpi/dptf.asl +++ b/src/mainboard/google/cyan/variants/ultima/include/variant/acpi/dptf.asl @@ -5,7 +5,6 @@ #define DPTF_TSR0_PASSIVE 60 #define DPTF_TSR0_CRITICAL 70 - #define DPTF_TSR1_SENSOR_ID 1 #define DPTF_TSR1_SENSOR_NAME "TMP432_DDR" #define DPTF_TSR1_PASSIVE 55 @@ -16,7 +15,6 @@ #define DPTF_TSR2_PASSIVE 42 #define DPTF_TSR2_CRITICAL 70 - #define DPTF_ENABLE_CHARGER /* Charger performance states, board-specific values from charger and EC */ diff --git a/src/mainboard/google/cyan/variants/wizpig/gpio.c b/src/mainboard/google/cyan/variants/wizpig/gpio.c index 300f7d6acc..6e993305bb 100644 --- a/src/mainboard/google/cyan/variants/wizpig/gpio.c +++ b/src/mainboard/google/cyan/variants/wizpig/gpio.c @@ -64,7 +64,6 @@ static const struct soc_gpio_map gpse_gpio_map[] = { GPIO_END }; - /* South West Community */ static const struct soc_gpio_map gpsw_gpio_map[] = { GPIO_NC, /* 00 FST_SPI_D2 */ @@ -130,7 +129,6 @@ static const struct soc_gpio_map gpsw_gpio_map[] = { GPIO_END }; - /* North Community */ static const struct soc_gpio_map gpn_gpio_map[] = { GPIO_NC, /* 00 GPIO_DFX0 */ @@ -200,7 +198,6 @@ static const struct soc_gpio_map gpn_gpio_map[] = { GPIO_END }; - /* East Community */ static const struct soc_gpio_map gpe_gpio_map[] = { Native_M1, /* 00 PMU_SLP_S3_B */ @@ -230,7 +227,6 @@ static const struct soc_gpio_map gpe_gpio_map[] = { GPIO_END }; - static struct soc_gpio_config gpio_config = { /* BSW */ .north = gpn_gpio_map, diff --git a/src/mainboard/google/cyan/variants/wizpig/include/variant/acpi/dptf.asl b/src/mainboard/google/cyan/variants/wizpig/include/variant/acpi/dptf.asl index 273020cd34..c5914976b4 100644 --- a/src/mainboard/google/cyan/variants/wizpig/include/variant/acpi/dptf.asl +++ b/src/mainboard/google/cyan/variants/wizpig/include/variant/acpi/dptf.asl @@ -5,7 +5,6 @@ #define DPTF_TSR0_PASSIVE 49 #define DPTF_TSR0_CRITICAL 75 - #define DPTF_TSR1_SENSOR_ID 1 #define DPTF_TSR1_SENSOR_NAME "TMP432_Power_top" #define DPTF_TSR1_PASSIVE 65 @@ -16,7 +15,6 @@ #define DPTF_TSR2_PASSIVE 49 #define DPTF_TSR2_CRITICAL 75 - #define DPTF_ENABLE_CHARGER /* Charger performance states, board-specific values from charger and EC */ diff --git a/src/mainboard/google/dedede/dsdt.asl b/src/mainboard/google/dedede/dsdt.asl index 933ca1a503..6365e5e145 100644 --- a/src/mainboard/google/dedede/dsdt.asl +++ b/src/mainboard/google/dedede/dsdt.asl @@ -37,7 +37,6 @@ DefinitionBlock( #include <variant/acpi/camera.asl> #endif - /* Include Low power idle table for a short term workaround to enable S0ix. Once cr50 pulse width is fixed, this can be removed. */ #include <soc/intel/common/acpi/lpit.asl> diff --git a/src/mainboard/google/dedede/romstage.c b/src/mainboard/google/dedede/romstage.c index db6f7db4f0..8028db0e6a 100644 --- a/src/mainboard/google/dedede/romstage.c +++ b/src/mainboard/google/dedede/romstage.c @@ -32,7 +32,6 @@ bool mainboard_get_dram_part_num(const char **part_num, size_t *len) return false; } - *part_num = &part_num_store[0]; *len = strlen(part_num_store); return true; diff --git a/src/mainboard/google/dedede/variants/baseboard/gpio.c b/src/mainboard/google/dedede/variants/baseboard/gpio.c index d6a2d61aca..1d8d21d788 100644 --- a/src/mainboard/google/dedede/variants/baseboard/gpio.c +++ b/src/mainboard/google/dedede/variants/baseboard/gpio.c @@ -238,7 +238,6 @@ static const struct pad_config gpio_table[] = { /* E23 : CNV_RGI_RSP */ PAD_CFG_NF(GPP_E23, NONE, DEEP, NF1), - /* F4 : CNV_RF_RST_L */ PAD_CFG_NF(GPP_F4, NONE, DEEP, NF1), /* F7 : EMMC_CMD */ @@ -341,7 +340,6 @@ static const struct pad_config gpio_table[] = { /* R7 : I2S_SPK_AUDIO */ PAD_CFG_NF(GPP_R7, NONE, DEEP, NF1), - /* S0 : RAM_STRAP_4 */ PAD_CFG_GPI(GPP_S0, NONE, DEEP), /* S1 : RSVD_STRAP */ @@ -359,7 +357,6 @@ static const struct pad_config gpio_table[] = { /* S7 : DMIC0_DATA */ PAD_CFG_NF(GPP_S7, NONE, DEEP, NF2), - /* GPD0 : AP_BATLOW_L */ PAD_CFG_NF(GPD0, NONE, DEEP, NF1), /* GPD1 : GPP_GPD1/ACPRESENT */ diff --git a/src/mainboard/google/deltaur/mainboard.c b/src/mainboard/google/deltaur/mainboard.c index faca003ab7..e1cdb96959 100644 --- a/src/mainboard/google/deltaur/mainboard.c +++ b/src/mainboard/google/deltaur/mainboard.c @@ -7,7 +7,6 @@ #include <vendorcode/google/chromeos/chromeos.h> #include <variant/gpio.h> - static void mainboard_enable(struct device *dev) { dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; diff --git a/src/mainboard/google/gale/blsp.c b/src/mainboard/google/gale/blsp.c index 90d8c6578f..040b662f24 100644 --- a/src/mainboard/google/gale/blsp.c +++ b/src/mainboard/google/gale/blsp.c @@ -29,7 +29,6 @@ #endif - #if IPQ40XX_I2C1_PINGROUP_1 #define SCL_GPIO_I2C1 34 diff --git a/src/mainboard/google/gale/verstage.c b/src/mainboard/google/gale/verstage.c index d1cf1b3f15..9bdd307bc1 100644 --- a/src/mainboard/google/gale/verstage.c +++ b/src/mainboard/google/gale/verstage.c @@ -4,7 +4,6 @@ #include <gpio.h> #include <soc/verstage.h> - #define TPM_RESET_GPIO 19 static void ipq_setup_tpm(void) diff --git a/src/mainboard/google/glados/romstage.c b/src/mainboard/google/glados/romstage.c index b065cdd57e..9a968b16d4 100644 --- a/src/mainboard/google/glados/romstage.c +++ b/src/mainboard/google/glados/romstage.c @@ -10,7 +10,6 @@ #include "spd/spd_util.h" #include "spd/spd.h" - void mainboard_memory_init_params(FSPM_UPD *mupd) { FSP_M_CONFIG *mem_cfg = &mupd->FspmConfig; diff --git a/src/mainboard/google/jecht/romstage.c b/src/mainboard/google/jecht/romstage.c index 1f03aed319..612901123e 100644 --- a/src/mainboard/google/jecht/romstage.c +++ b/src/mainboard/google/jecht/romstage.c @@ -11,7 +11,6 @@ #include <mainboard/google/jecht/spd/spd.h> #include "onboard.h" - void mainboard_pre_raminit(struct romstage_params *rp) { /* Fill out PEI DATA */ diff --git a/src/mainboard/google/kahlee/mainboard.c b/src/mainboard/google/kahlee/mainboard.c index d67cdec6fd..b33fb69e89 100644 --- a/src/mainboard/google/kahlee/mainboard.c +++ b/src/mainboard/google/kahlee/mainboard.c @@ -160,7 +160,6 @@ static void kahlee_enable(struct device *dev) dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator; } - static void mainboard_final(void *chip_info) { struct global_nvs *gnvs; diff --git a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/routing.asl b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/routing.asl index 72996cee68..4ed052cca4 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/routing.asl +++ b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/routing.asl @@ -13,7 +13,6 @@ Name (PR0, Package() Package() { 0x0001FFFF, 2, INTE, 0 }, Package() { 0x0001FFFF, 3, INTF, 0 }, - /* Bus 0, Dev 2 Func 0,1,2,3,4,5 - PCIe Bridges */ Package() { 0x0002FFFF, 0, INTH, 0 }, Package() { 0x0002FFFF, 1, INTA, 0 }, @@ -74,7 +73,6 @@ Name (APR0, Package() Package() { 0x0011FFFF, 0, 0, 19 }, }) - /* GPP 0 */ Name (PS4, Package() { diff --git a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h index a3be62a3b8..a55e7a304d 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ - #ifndef __BASEBOARD_VARIANTS_H__ #define __BASEBOARD_VARIANTS_H__ diff --git a/src/mainboard/google/kahlee/variants/baseboard/mainboard.c b/src/mainboard/google/kahlee/variants/baseboard/mainboard.c index 868253043a..95f0a8d642 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/mainboard.c +++ b/src/mainboard/google/kahlee/variants/baseboard/mainboard.c @@ -78,7 +78,6 @@ void board_bh720(struct device *dev) write32((void *)(sdbar + BH720_MEM_ACCESS_EN), 0x80000000); } - const char *smbios_mainboard_manufacturer(void) { static char oem_bin_data[11]; diff --git a/src/mainboard/google/kahlee/variants/nuwani/mainboard.c b/src/mainboard/google/kahlee/variants/nuwani/mainboard.c index 3f20bc8881..df31c6f42f 100644 --- a/src/mainboard/google/kahlee/variants/nuwani/mainboard.c +++ b/src/mainboard/google/kahlee/variants/nuwani/mainboard.c @@ -90,7 +90,6 @@ void board_bh720(struct device *dev) BH720_PROTECT_ON | BH720_PROTECT_LOCK_ON); } - const char *smbios_mainboard_manufacturer(void) { static char oem_bin_data[11]; diff --git a/src/mainboard/google/kahlee/variants/treeya/mainboard.c b/src/mainboard/google/kahlee/variants/treeya/mainboard.c index 3f20bc8881..df31c6f42f 100644 --- a/src/mainboard/google/kahlee/variants/treeya/mainboard.c +++ b/src/mainboard/google/kahlee/variants/treeya/mainboard.c @@ -90,7 +90,6 @@ void board_bh720(struct device *dev) BH720_PROTECT_ON | BH720_PROTECT_LOCK_ON); } - const char *smbios_mainboard_manufacturer(void) { static char oem_bin_data[11]; diff --git a/src/mainboard/google/kukui/panel_anx7625.c b/src/mainboard/google/kukui/panel_anx7625.c index cae9edc041..cc41c86e63 100644 --- a/src/mainboard/google/kukui/panel_anx7625.c +++ b/src/mainboard/google/kukui/panel_anx7625.c @@ -9,7 +9,6 @@ #include "panel.h" - static void power_on_anx7625(void) { /* Disable backlight before turning on bridge */ diff --git a/src/mainboard/google/kukui/panel_ps8640.c b/src/mainboard/google/kukui/panel_ps8640.c index 6b8015108b..f758e749ce 100644 --- a/src/mainboard/google/kukui/panel_ps8640.c +++ b/src/mainboard/google/kukui/panel_ps8640.c @@ -9,7 +9,6 @@ #include "panel.h" - static void power_on_ps8640(void) { /* Disable backlight before turning on bridge */ diff --git a/src/mainboard/google/link/hda_verb.c b/src/mainboard/google/link/hda_verb.c index 8cd84f0417..1f54222ae0 100644 --- a/src/mainboard/google/link/hda_verb.c +++ b/src/mainboard/google/link/hda_verb.c @@ -110,7 +110,6 @@ const u32 cim_verb_data[] = { AZALIA_PIN_CFG(3, 0x07, 0x18560030), }; - const u32 pc_beep_verbs[] = { 0x00170500, /* power up codec */ 0x00270500, /* power up DAC */ diff --git a/src/mainboard/google/link/mainboard.c b/src/mainboard/google/link/mainboard.c index 1438c7f720..c4b621ac7a 100644 --- a/src/mainboard/google/link/mainboard.c +++ b/src/mainboard/google/link/mainboard.c @@ -105,8 +105,6 @@ static int int15_handler(void) } #endif - - static void mainboard_init(struct device *dev) { uint32_t board_version = 0; diff --git a/src/mainboard/google/octopus/variants/bobba/variant.c b/src/mainboard/google/octopus/variants/bobba/variant.c index 0c4f93e051..96806a0b24 100644 --- a/src/mainboard/google/octopus/variants/bobba/variant.c +++ b/src/mainboard/google/octopus/variants/bobba/variant.c @@ -47,7 +47,6 @@ void variant_smi_sleep(u8 slp_typ) } } - void variant_update_devtree(struct device *dev) { struct soc_intel_apollolake_config *cfg = NULL; diff --git a/src/mainboard/google/parrot/acpi/superio.asl b/src/mainboard/google/parrot/acpi/superio.asl index 2265c82bbb..d13b0bd5c5 100644 --- a/src/mainboard/google/parrot/acpi/superio.asl +++ b/src/mainboard/google/parrot/acpi/superio.asl @@ -3,7 +3,6 @@ /* mainboard configuration */ #include "../ec.h" - #define SIO_EC_ENABLE_PS2K // Enable PS/2 Keyboard /* ACPI code for EC SuperIO functions */ diff --git a/src/mainboard/google/parrot/acpi_tables.c b/src/mainboard/google/parrot/acpi_tables.c index 3332286a29..62e52c483f 100644 --- a/src/mainboard/google/parrot/acpi_tables.c +++ b/src/mainboard/google/parrot/acpi_tables.c @@ -22,7 +22,6 @@ void acpi_create_gnvs(struct global_nvs *gnvs) gnvs->s5u0 = 0; gnvs->s5u1 = 0; - #if CONFIG(CHROMEOS) gnvs->chromeos.vbt2 = parrot_ec_running_ro() ? ACTIVE_ECFW_RO : ACTIVE_ECFW_RW; diff --git a/src/mainboard/google/parrot/ec.c b/src/mainboard/google/parrot/ec.c index d98edecb01..3aa58c35a6 100644 --- a/src/mainboard/google/parrot/ec.c +++ b/src/mainboard/google/parrot/ec.c @@ -7,7 +7,6 @@ #include <ec/compal/ene932/ec.h> #include "ec.h" - void parrot_ec_init(void) { printk(BIOS_DEBUG, "Parrot EC Init\n"); @@ -53,7 +52,6 @@ void parrot_ec_init(void) ec_kbc_write_ib(0xA2); } - /* Parrot Hardware Revision */ u8 parrot_rev(void) { diff --git a/src/mainboard/google/parrot/hda_verb.c b/src/mainboard/google/parrot/hda_verb.c index 9d58a0e46d..1c838a390b 100644 --- a/src/mainboard/google/parrot/hda_verb.c +++ b/src/mainboard/google/parrot/hda_verb.c @@ -23,7 +23,6 @@ const u32 cim_verb_data[] = { 0x10250742, // Subsystem ID 0x0000000E, // Number of jacks (NID entries) - /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x10250742 */ AZALIA_SUBVENDOR(0, 0x10250742), diff --git a/src/mainboard/google/parrot/mainboard.c b/src/mainboard/google/parrot/mainboard.c index 4e031d3dfb..16695dbeb8 100644 --- a/src/mainboard/google/parrot/mainboard.c +++ b/src/mainboard/google/parrot/mainboard.c @@ -18,7 +18,6 @@ void mainboard_suspend_resume(void) apm_control(APM_CNT_ACPI_ENABLE); } - static void mainboard_init(struct device *dev) { /* Initialize the Embedded Controller */ diff --git a/src/mainboard/google/parrot/smihandler.c b/src/mainboard/google/parrot/smihandler.c index a359e06af3..22e372dead 100644 --- a/src/mainboard/google/parrot/smihandler.c +++ b/src/mainboard/google/parrot/smihandler.c @@ -54,13 +54,10 @@ void mainboard_smi_sleep(u8 slp_typ) printk(BIOS_DEBUG, "mainboard_smi_sleep: %x\n", slp_typ); /* Disable SCI and SMI events */ - /* Clear pending events that may trigger immediate wake */ - /* Enable wake events */ - /* Tell the EC to Disable USB power */ if (gnvs->s3u0 == 0 && gnvs->s3u1 == 0) { ec_kbc_write_cmd(0x45); diff --git a/src/mainboard/google/peach_pit/mainboard.c b/src/mainboard/google/peach_pit/mainboard.c index 33541b231e..85c0407e81 100644 --- a/src/mainboard/google/peach_pit/mainboard.c +++ b/src/mainboard/google/peach_pit/mainboard.c @@ -231,7 +231,6 @@ static void parade_dp_bridge_setup(void) udelay(10); gpio_set_value(dp_rst_l, 1); - gpio_set_pull(dp_hpd, GPIO_PULL_NONE); gpio_cfg_pin(dp_hpd, GPIO_INPUT); diff --git a/src/mainboard/google/peach_pit/romstage.c b/src/mainboard/google/peach_pit/romstage.c index 53fdfbacd4..83d38fa142 100644 --- a/src/mainboard/google/peach_pit/romstage.c +++ b/src/mainboard/google/peach_pit/romstage.c @@ -176,7 +176,6 @@ static void simple_spi_test(void) return; } - for (i = 0; i < amt; i += 4){ if (rdev_readat(boot_dev, &in, i, 4) < 4) { printk(BIOS_SPEW, "simple_spi_test fails at %d\n", i); diff --git a/src/mainboard/google/poppy/chromeos.c b/src/mainboard/google/poppy/chromeos.c index a51207e990..5dd1e9877e 100644 --- a/src/mainboard/google/poppy/chromeos.c +++ b/src/mainboard/google/poppy/chromeos.c @@ -9,7 +9,6 @@ #include <variant/gpio.h> - void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { diff --git a/src/mainboard/google/poppy/variants/atlas/gpio.c b/src/mainboard/google/poppy/variants/atlas/gpio.c index c459bad90a..3a15023894 100644 --- a/src/mainboard/google/poppy/variants/atlas/gpio.c +++ b/src/mainboard/google/poppy/variants/atlas/gpio.c @@ -388,7 +388,6 @@ static const struct pad_config ish_enabled_gpio_table[] = { PAD_CFG_NF_1V8(GPP_D14, NONE, DEEP, NF1), }; - static const struct pad_config ish_disabled_gpio_table[] = { /* A19 : GPP_A19 ==> TRACKPAD_INT_L * trackpad interrupt to PCH diff --git a/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/cam0.asl b/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/cam0.asl index ddd05f1273..b973200ffe 100644 --- a/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/cam0.asl +++ b/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/cam0.asl @@ -65,7 +65,6 @@ Scope (\_SB.PCI0.I2C3) Name (_PR0, Package (0x01) { FCPR }) Name (_PR3, Package (0x01) { FCPR }) - /* Port0 of CAM0 is connected to port0 of CIO2 device */ Name (_DSD, Package () { ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), diff --git a/src/mainboard/google/rambi/variants/clapper/gpio.c b/src/mainboard/google/rambi/variants/clapper/gpio.c index db313c07ea..1386ae1369 100644 --- a/src/mainboard/google/rambi/variants/clapper/gpio.c +++ b/src/mainboard/google/rambi/variants/clapper/gpio.c @@ -197,7 +197,6 @@ static const u8 core_dedicated_irq[GPIO_MAX_DIRQS] = { [I8042_IRQ_OFFSET] = I8042_IRQ_GPIO, }; - static const u8 sus_dedicated_irq[GPIO_MAX_DIRQS] = { [CODEC_IRQ_OFFSET] = CODEC_IRQ_GPIO, }; diff --git a/src/mainboard/google/reef/variants/pyro/memory.c b/src/mainboard/google/reef/variants/pyro/memory.c index dfe936faaf..1cc9b99361 100644 --- a/src/mainboard/google/reef/variants/pyro/memory.c +++ b/src/mainboard/google/reef/variants/pyro/memory.c @@ -5,7 +5,6 @@ #include <soc/meminit.h> #include <variant/gpio.h> - static const struct lpddr4_sku skus[] = { /* * K4F6E304HB-MGCJ - both logical channels While the parts diff --git a/src/mainboard/google/reef/variants/sand/include/variant/ec.h b/src/mainboard/google/reef/variants/sand/include/variant/ec.h index 8d0105f15e..87d2887135 100644 --- a/src/mainboard/google/reef/variants/sand/include/variant/ec.h +++ b/src/mainboard/google/reef/variants/sand/include/variant/ec.h @@ -60,7 +60,6 @@ #define EC_ENABLE_LID_SWITCH #define EC_ENABLE_WAKE_PIN GPE_EC_WAKE - #define SIO_EC_MEMMAP_ENABLE /* EC Memory Map Resources */ #define SIO_EC_HOST_ENABLE /* EC Host Interface Resources */ #define SIO_EC_ENABLE_PS2K /* Enable PS/2 Keyboard */ diff --git a/src/mainboard/google/slippy/acpi_tables.c b/src/mainboard/google/slippy/acpi_tables.c index 3435c28111..666143cbe1 100644 --- a/src/mainboard/google/slippy/acpi_tables.c +++ b/src/mainboard/google/slippy/acpi_tables.c @@ -23,7 +23,6 @@ void acpi_create_gnvs(struct global_nvs *gnvs) /* TPM Present */ gnvs->tpmp = 1; - #if CONFIG(CHROMEOS) gnvs->chromeos.vbt2 = google_ec_running_ro() ? ACTIVE_ECFW_RO : ACTIVE_ECFW_RW; diff --git a/src/mainboard/google/slippy/mainboard.c b/src/mainboard/google/slippy/mainboard.c index 2a819d3a35..90f28e7ec2 100644 --- a/src/mainboard/google/slippy/mainboard.c +++ b/src/mainboard/google/slippy/mainboard.c @@ -16,8 +16,6 @@ void mainboard_suspend_resume(void) apm_control(APM_CNT_FINALIZE); } - - static void mainboard_init(struct device *dev) { mainboard_ec_init(); diff --git a/src/mainboard/google/stout/acpi_tables.c b/src/mainboard/google/stout/acpi_tables.c index 27b6eca1f6..f994e57912 100644 --- a/src/mainboard/google/stout/acpi_tables.c +++ b/src/mainboard/google/stout/acpi_tables.c @@ -23,7 +23,6 @@ void acpi_create_gnvs(struct global_nvs *gnvs) gnvs->s5u0 = 0; gnvs->s5u1 = 0; - #if CONFIG(CHROMEOS) gnvs->chromeos.vbt2 = get_recovery_mode_switch() ? ACTIVE_ECFW_RO : ACTIVE_ECFW_RW; diff --git a/src/mainboard/google/stout/ec.c b/src/mainboard/google/stout/ec.c index 6e9b490917..05ff973a47 100644 --- a/src/mainboard/google/stout/ec.c +++ b/src/mainboard/google/stout/ec.c @@ -55,14 +55,12 @@ void stout_ec_finalize_smm(void) critical_shutdown = 1; } - /* Thermal Device Error : Peripheral Status 3 (0x35) bit 8 */ if (ec_reg & 0x80) { printk(BIOS_ERR, " EC Thermal Device Error\n"); critical_shutdown = 1; } - /* Critical Battery Error */ ec_reg = ec_read(EC_MBAT_STATUS); @@ -75,7 +73,6 @@ void stout_ec_finalize_smm(void) printk(BIOS_ERR, " EC Read Battery Error\n"); } - if (critical_shutdown) { printk(BIOS_ERR, "EC critical_shutdown"); diff --git a/src/mainboard/google/stout/mainboard.c b/src/mainboard/google/stout/mainboard.c index 29a6923726..7f4e29d2e8 100644 --- a/src/mainboard/google/stout/mainboard.c +++ b/src/mainboard/google/stout/mainboard.c @@ -17,8 +17,6 @@ void mainboard_suspend_resume(void) ec_write_cmd(EC_CMD_NOTIFY_ACPI_ENTER); } - - static void mainboard_init(struct device *dev) { struct device *ethernet_dev = NULL; diff --git a/src/mainboard/google/veyron_rialto/chromeos.c b/src/mainboard/google/veyron_rialto/chromeos.c index 4c9587abc0..95158bf9ee 100644 --- a/src/mainboard/google/veyron_rialto/chromeos.c +++ b/src/mainboard/google/veyron_rialto/chromeos.c @@ -11,7 +11,6 @@ #define GPIO_RECOVERY_SERVO GPIO(0, B, 1) #define GPIO_RECOVERY_PUSHKEY GPIO(7, B, 1) - void setup_chromeos_gpios(void) { gpio_input(GPIO_WP); diff --git a/src/mainboard/google/volteer/romstage.c b/src/mainboard/google/volteer/romstage.c index 8893785774..552648bfe3 100644 --- a/src/mainboard/google/volteer/romstage.c +++ b/src/mainboard/google/volteer/romstage.c @@ -11,7 +11,6 @@ #include <soc/romstage.h> #include <variant/gpio.h> - void mainboard_memory_init_params(FSPM_UPD *mupd) { FSP_M_CONFIG *mem_cfg = &mupd->FspmConfig; diff --git a/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h index bedcb0dd08..338b918623 100644 --- a/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ - #ifndef __BASEBOARD_VARIANTS_H__ #define __BASEBOARD_VARIANTS_H__ diff --git a/src/mainboard/google/zork/variants/baseboard/ramstage_common.c b/src/mainboard/google/zork/variants/baseboard/ramstage_common.c index c2a0294bbc..a9414b92e0 100644 --- a/src/mainboard/google/zork/variants/baseboard/ramstage_common.c +++ b/src/mainboard/google/zork/variants/baseboard/ramstage_common.c @@ -127,7 +127,6 @@ void variant_audio_update(void) update_hp_int_odl(); } - /* * Removes reset_gpio from usb device in device tree. * |