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-rw-r--r--src/mainboard/tyan/s2885/Config.lb7
-rw-r--r--src/mainboard/tyan/s2885/auto.c11
-rw-r--r--src/mainboard/tyan/s2885/resourcemap.c4
3 files changed, 7 insertions, 15 deletions
diff --git a/src/mainboard/tyan/s2885/Config.lb b/src/mainboard/tyan/s2885/Config.lb
index db6b2f030c..b787b1b965 100644
--- a/src/mainboard/tyan/s2885/Config.lb
+++ b/src/mainboard/tyan/s2885/Config.lb
@@ -120,10 +120,6 @@ mainboardinit cpu/i386/bist32_fail.inc
###
### Romcc output
###
-#makerule ./failover.E dep "$(MAINBOARD)/failover.c" act "$(CPP) -I$(TOP)/src $(CPPFLAGS) $(MAINBOARD)/failover.c > ./failever.E"
-#makerule ./failover.inc dep "./romcc ./failover.E" act "./romcc -O ./failover.E > failover.inc"
-#mainboardinit .failover.inc
-
makerule ./failover.E
depends "$(MAINBOARD)/failover.c"
action "$(CPP) -I$(TOP)/src $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/failover.c > ./failover.E"
@@ -141,8 +137,7 @@ end
makerule ./auto.inc
depends "./romcc ./auto.E"
- action "./romcc -O -mcpu=k8 -o auto.inc --label-prefix=auto ./auto.E"
-# action "./romcc -mcpu=k8 -O ./auto.E > auto.inc"
+ action "./romcc -O2 -mcpu=k8 -o auto.inc --label-prefix=auto ./auto.E"
end
mainboardinit cpu/k8/enable_mmx_sse.inc
diff --git a/src/mainboard/tyan/s2885/auto.c b/src/mainboard/tyan/s2885/auto.c
index fe3b691f98..2a620deec3 100644
--- a/src/mainboard/tyan/s2885/auto.c
+++ b/src/mainboard/tyan/s2885/auto.c
@@ -151,16 +151,13 @@ static void main(void)
{
.udev = PCI_DEV(0, 0x18, 0),
.upos = 0xc0,
- .devreg = 0xe2,
- .mindev = 1,
- },
+ .devreg = 0xe0,
+ },
{
.udev = PCI_DEV(0, 0x18, 0),
.upos = 0x80,
- .devreg = 0xe6,
- .mindev = 5,
-
- },
+ .devreg = 0xe4,
+ },
};
int needs_reset;
diff --git a/src/mainboard/tyan/s2885/resourcemap.c b/src/mainboard/tyan/s2885/resourcemap.c
index 6e6502372e..31cf8e04a5 100644
--- a/src/mainboard/tyan/s2885/resourcemap.c
+++ b/src/mainboard/tyan/s2885/resourcemap.c
@@ -252,8 +252,8 @@ static void setup_s2885_resource_map(void)
* [31:24] Bus Number Limit i
* This field defines the highest bus number in configuration regin i
*/
- PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x04010207,
- PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x06050007,
+ PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x06010207,
+ PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000007,
PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000,
PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000,
};