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Diffstat (limited to 'src/mainboard/tyan/s2885/mptable.c')
-rw-r--r--src/mainboard/tyan/s2885/mptable.c185
1 files changed, 41 insertions, 144 deletions
diff --git a/src/mainboard/tyan/s2885/mptable.c b/src/mainboard/tyan/s2885/mptable.c
index a9683d577c..83cbaf0e18 100644
--- a/src/mainboard/tyan/s2885/mptable.c
+++ b/src/mainboard/tyan/s2885/mptable.c
@@ -3,44 +3,25 @@
#include <device/pci.h>
#include <string.h>
#include <stdint.h>
-#if CONFIG_LOGICAL_CPUS==1
-#include <cpu/amd/dualcore.h>
-#endif
+extern unsigned char bus_isa;
+extern unsigned char bus_8131_0;
+extern unsigned char bus_8131_1;
+extern unsigned char bus_8131_2;
+extern unsigned char bus_8111_0;
+extern unsigned char bus_8111_1;
+extern unsigned char bus_8151_0;
+extern unsigned char bus_8151_1;
+extern unsigned apicid_8111;
+extern unsigned apicid_8131_1;
+extern unsigned apicid_8131_2;
-static unsigned node_link_to_bus(unsigned node, unsigned link)
-{
- device_t dev;
- unsigned reg;
+extern unsigned sbdn;
+extern unsigned hcdn[];
+extern unsigned sbdn3;
+extern unsigned sbdn5;
- dev = dev_find_slot(0, PCI_DEVFN(0x18, 1));
- if (!dev) {
- return 0;
- }
- for(reg = 0xE0; reg < 0xF0; reg += 0x04) {
- uint32_t config_map;
- unsigned dst_node;
- unsigned dst_link;
- unsigned bus_base;
- config_map = pci_read_config32(dev, reg);
- if ((config_map & 3) != 3) {
- continue;
- }
- dst_node = (config_map >> 4) & 7;
- dst_link = (config_map >> 8) & 3;
- bus_base = (config_map >> 16) & 0xff;
-#if 0
- printk_debug("node.link=bus: %d.%d=%d 0x%2x->0x%08x\n",
- dst_node, dst_link, bus_base,
- reg, config_map);
-#endif
- if ((dst_node == node) && (dst_link == link))
- {
- return bus_base;
- }
- }
- return 0;
-}
+extern void get_bus_conf(void);
void *smp_write_config_table(void *v)
@@ -51,18 +32,7 @@ void *smp_write_config_table(void *v)
struct mp_config_table *mc;
unsigned char bus_num;
- unsigned char bus_isa;
- unsigned char bus_8131_0;
- unsigned char bus_8131_1;
- unsigned char bus_8131_2;
- unsigned char bus_8111_0;
- unsigned char bus_8111_1;
- unsigned char bus_8151_0;
- unsigned char bus_8151_1;
- unsigned apicid_base;
- unsigned apicid_8111;
- unsigned apicid_8131_1;
- unsigned apicid_8131_2;
+ int i;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@@ -84,71 +54,7 @@ void *smp_write_config_table(void *v)
smp_write_processors(mc);
- {
- device_t dev;
-
- /* HT chain 0 */
- bus_8151_0 = node_link_to_bus(0, 0);
- if (bus_8151_0 == 0) {
- printk_debug("ERROR - cound not find bus for node 0 chain 0, using defaults\n");
- bus_8151_0 = 1;
- }
- /* 8151 */
- dev = dev_find_slot(bus_8151_0, PCI_DEVFN(0x02,0));
- if (dev) {
- bus_8151_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-// printk_debug("bus_8151_1=%d\n",bus_8151_1);
- bus_8111_0 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_8111_0++;
- bus_8131_0 = bus_8111_0;
-// printk_debug("bus_8111_0=%d\n",bus_8111_0);
- }
- else {
- printk_debug("ERROR - could not find PCI 1:02.0, using defaults\n");
- bus_8151_1 = 2;
- bus_8111_0 = bus_8131_0 = 3;
- }
-
- /* 8111 */
- dev = dev_find_slot(bus_8111_0, PCI_DEVFN(0x03,0));
- if (dev) {
- bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_isa++;
-// printk_debug("bus_isa=%d\n",bus_isa);
- }
- else {
- printk_debug("ERROR - could not find PCI %02x:03.0, using defaults\n", bus_8111_0);
-
- bus_8111_1 = 6;
- bus_isa = 7;
- }
- /* 8131-1 */
- dev = dev_find_slot(bus_8131_0, PCI_DEVFN(0x01,0));
- if (dev) {
- bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-
- }
- else {
- printk_debug("ERROR - could not find PCI %02x:01.0, using defaults\n", bus_8131_0);
-
- bus_8131_1 = 4;
- }
- /* 8131-2 */
- dev = dev_find_slot(bus_8131_0, PCI_DEVFN(0x02,0));
- if (dev) {
- bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-
- }
- else {
- printk_debug("ERROR - could not find PCI %02x:02.0, using defaults\n", bus_8131_0);
-
- bus_8131_2 = 5;
- }
-
- }
-
-
+ get_bus_conf();
/*Bus: Bus ID Type*/
/* define bus and isa numbers */
@@ -158,26 +64,18 @@ void *smp_write_config_table(void *v)
smp_write_bus(mc, bus_isa, "ISA ");
/*I/O APICs: APIC ID Version State Address*/
-#if CONFIG_LOGICAL_CPUS==1
- apicid_base = get_apicid_base(3);
-#else
- apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
-#endif
- apicid_8111 = apicid_base+0;
- apicid_8131_1 = apicid_base+1;
- apicid_8131_2 = apicid_base+2;
smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000); //8111
{
device_t dev;
struct resource *res;
- dev = dev_find_slot(bus_8131_0, PCI_DEVFN(0x1,1));
+ dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3,1));
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
smp_write_ioapic(mc, apicid_8131_1, 0x11, res->base);
}
}
- dev = dev_find_slot(bus_8131_0, PCI_DEVFN(0x2,1));
+ dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3+1,1));
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
@@ -201,9 +99,9 @@ void *smp_write_config_table(void *v)
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xe, apicid_8111, 0xe);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xf, apicid_8111, 0xf);
//??? What
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_0, (4<<2)|3, apicid_8111, 0x13);
+ smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_0, ((sbdn+1)<<2)|3, apicid_8111, 0x13);
//Onboard AMD AC97 Audio
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_0, (4<<2)|1, apicid_8111, 0x11);
+ smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_0, ((sbdn+1)<<2)|1, apicid_8111, 0x11);
// Onboard AMD USB
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0<<2)|3, apicid_8111, 0x13);
@@ -218,34 +116,33 @@ void *smp_write_config_table(void *v)
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (9<<2)|0, apicid_8131_1, 0x0);
//Slot 5 PCI 32
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0x0a<<2)|0, apicid_8111, 0x10);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0x0a<<2)|1, apicid_8111, 0x11);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0x0a<<2)|2, apicid_8111, 0x12); //
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0x0a<<2)|3, apicid_8111, 0x13); //
+ for(i=0;i<4;i++) {
+ smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0x0a<<2)|i, apicid_8111, 0x10 + (0+i)%4); //16
+ }
+
//Slot 3 PCIX 100/66
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (8<<2)|0, apicid_8131_1, 0x3);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (8<<2)|1, apicid_8131_1, 0x0);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (8<<2)|2, apicid_8131_1, 0x1);//
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (8<<2)|3, apicid_8131_1, 0x2);//
+ for(i=0;i<4;i++) {
+ smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (8<<2)|i, apicid_8131_1, (3+i)%4); //27
+ }
+
//Slot 4 PCIX 100/66
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (7<<2)|0, apicid_8131_1, 0x2);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (7<<2)|1, apicid_8131_1, 0x3);//
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (7<<2)|2, apicid_8131_1, 0x0);//
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (7<<2)|3, apicid_8131_1, 0x1);//
+ for(i=0;i<4;i++) {
+ smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (7<<2)|i, apicid_8131_1, (2+i)%4); //26
+ }
+
//Slot 1 PCI-X 133/100/66
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (3<<2)|0, apicid_8131_2, 0x0);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (3<<2)|1, apicid_8131_2, 0x1);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (3<<2)|2, apicid_8131_2, 0x2); //
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (3<<2)|3, apicid_8131_2, 0x3); //
+ for(i=0;i<4;i++) {
+ smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (3<<2)|i, apicid_8131_2, (0+i)%4); //28
+ }
+
//Slot 2 PCI-X 133/100/66
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (6<<2)|0, apicid_8131_2, 0x1);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (6<<2)|1, apicid_8131_2, 0x2);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (6<<2)|2, apicid_8131_2, 0x3);//
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (6<<2)|3, apicid_8131_2, 0x0);//
+ for(i=0;i<4;i++) {
+ smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (6<<2)|i, apicid_8131_2, (1+i)%4); //29
+ }
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);