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-rw-r--r--src/mainboard/tyan/s2735/Kconfig4
-rw-r--r--src/mainboard/tyan/s2735/cmos.layout4
-rw-r--r--src/mainboard/tyan/s2735/devicetree.cb6
-rw-r--r--src/mainboard/tyan/s2735/irq_tables.c2
-rw-r--r--src/mainboard/tyan/s2735/mptable.c8
-rw-r--r--src/mainboard/tyan/s2735/romstage.c4
6 files changed, 14 insertions, 14 deletions
diff --git a/src/mainboard/tyan/s2735/Kconfig b/src/mainboard/tyan/s2735/Kconfig
index a0f739c071..a387d1a4ba 100644
--- a/src/mainboard/tyan/s2735/Kconfig
+++ b/src/mainboard/tyan/s2735/Kconfig
@@ -26,12 +26,12 @@ config DCACHE_RAM_BASE
hex
default 0xcf000
depends on BOARD_TYAN_S2735
-
+
config DCACHE_RAM_SIZE
hex
default 0x1000
depends on BOARD_TYAN_S2735
-
+
config MAINBOARD_PART_NUMBER
string
default "S2735"
diff --git a/src/mainboard/tyan/s2735/cmos.layout b/src/mainboard/tyan/s2735/cmos.layout
index ccda70c808..608f02867c 100644
--- a/src/mainboard/tyan/s2735/cmos.layout
+++ b/src/mainboard/tyan/s2735/cmos.layout
@@ -30,8 +30,8 @@ entries
388 4 r 0 reboot_bits
392 3 e 5 baud_rate
395 1 e 2 hyper_threading
-396 1 e 1 thermal_monitoring
-397 1 e 1 remap_memory_high
+396 1 e 1 thermal_monitoring
+397 1 e 1 remap_memory_high
400 1 e 1 power_on_after_fail
412 4 e 6 debug_level
416 4 e 7 boot_first
diff --git a/src/mainboard/tyan/s2735/devicetree.cb b/src/mainboard/tyan/s2735/devicetree.cb
index 8ad5e0ecac..1e8b12a790 100644
--- a/src/mainboard/tyan/s2735/devicetree.cb
+++ b/src/mainboard/tyan/s2735/devicetree.cb
@@ -5,7 +5,7 @@ chip northbridge/intel/e7501
device pci 2.0 on
chip southbridge/intel/i82870
device pci 1c.0 on end
- device pci 1d.0 on
+ device pci 1d.0 on
device pci 1.0 on end # intel lan
device pci 1.1 on end
end
@@ -20,7 +20,7 @@ chip northbridge/intel/e7501
device pci 1d.2 on end
device pci 1d.3 on end
device pci 1d.7 on end
- device pci 1e.0 on
+ device pci 1e.0 on
device pci 1.0 on end # intel lan 10/100
device pci 2.0 on end # ati
end
@@ -56,7 +56,7 @@ chip northbridge/intel/e7501
io 0x60 = 0x220
io 0x62 = 0x300
irq 0x70 = 9
- end
+ end
device pnp 2e.8 off end # GPIO2
device pnp 2e.9 off end # GPIO3
device pnp 2e.a off end # ACPI
diff --git a/src/mainboard/tyan/s2735/irq_tables.c b/src/mainboard/tyan/s2735/irq_tables.c
index 4f6eb306dc..036b8d0cb0 100644
--- a/src/mainboard/tyan/s2735/irq_tables.c
+++ b/src/mainboard/tyan/s2735/irq_tables.c
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify!
+/* This file was generated by getpir.c, do not modify!
(but if you do, please run checkpir on it to verify)
Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
diff --git a/src/mainboard/tyan/s2735/mptable.c b/src/mainboard/tyan/s2735/mptable.c
index 6a73c6dc88..cde5c4e3b4 100644
--- a/src/mainboard/tyan/s2735/mptable.c
+++ b/src/mainboard/tyan/s2735/mptable.c
@@ -48,18 +48,18 @@ static void *smp_write_config_table(void *v)
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
smp_write_ioapic(mc, 0x09, 0x20, res->base);
- }
+ }
}
dev = dev_find_slot(1, PCI_DEVFN(0x1c,0));
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
smp_write_ioapic(mc, 0x0a, 0x20, res->base);
- }
+ }
}
}
/*I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#
-*/
+*/
smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x5, 0x0, 0x8, 0x0);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x5, 0x1, 0x8, 0x1);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x5, 0x0, 0x8, 0x2);
@@ -149,7 +149,7 @@ Compatibility Bus Address
predefined range: 0x00000000--
Compatibility Bus Address
bus ID: 0 address modifier: add
- predefined range: 0x00000001 // There is no extension information...
+ predefined range: 0x00000001 // There is no extension information...
*/
/* Compute the checksums */
mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
diff --git a/src/mainboard/tyan/s2735/romstage.c b/src/mainboard/tyan/s2735/romstage.c
index f581de431e..de3124cb90 100644
--- a/src/mainboard/tyan/s2735/romstage.c
+++ b/src/mainboard/tyan/s2735/romstage.c
@@ -1,4 +1,4 @@
-
+
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
@@ -50,7 +50,7 @@ void main(unsigned long bist)
.channel1 = { (0xa<<3)|4, (0xa<<3)|5, (0xa<<3)|6, 0 },
},
};
-
+
if (bist == 0) {
enable_lapic();
}