diff options
Diffstat (limited to 'src/mainboard/tyan/s2735/Options.lb')
| -rw-r--r-- | src/mainboard/tyan/s2735/Options.lb | 14 |
1 files changed, 3 insertions, 11 deletions
diff --git a/src/mainboard/tyan/s2735/Options.lb b/src/mainboard/tyan/s2735/Options.lb index 16b23a66bd..ada1beb593 100644 --- a/src/mainboard/tyan/s2735/Options.lb +++ b/src/mainboard/tyan/s2735/Options.lb @@ -3,9 +3,6 @@ uses HAVE_PIRQ_TABLE uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT uses HAVE_HARD_RESET -uses HARD_RESET_BUS -uses HARD_RESET_DEVICE -uses HARD_RESET_FUNCTION uses IRQ_SLOT_COUNT uses HAVE_OPTION_TABLE uses CONFIG_MAX_CPUS @@ -92,21 +89,16 @@ default HAVE_FALLBACK_BOOT=1 ## default HAVE_HARD_RESET=1 -default HARD_RESET_BUS=1 -default HARD_RESET_DEVICE=4 -default HARD_RESET_FUNCTION=0 - ## Delay timer options ## default CONFIG_UDELAY_TSC=1 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=1 - ## ## Build code to export a programmable irq routing table ## default HAVE_PIRQ_TABLE=1 -default IRQ_SLOT_COUNT=11 +default IRQ_SLOT_COUNT=15 ## ## Build code to export an x86 MP table @@ -148,8 +140,8 @@ default SERIAL_CPU_INIT=0 ## enable CACHE_AS_RAM specifics ## default USE_DCACHE_RAM=1 -default DCACHE_RAM_BASE=0xF2000000 -#default DCACHE_RAM_BASE=0xcf000 +#default DCACHE_RAM_BASE=0xF2000000 +default DCACHE_RAM_BASE=0xcf000 default DCACHE_RAM_SIZE=0x1000 #default CONFIG_USE_INIT=1 |