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-rw-r--r--src/mainboard/traverse/geos/Kconfig2
-rw-r--r--src/mainboard/traverse/geos/devicetree.cb2
-rw-r--r--src/mainboard/traverse/geos/romstage.c6
3 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/traverse/geos/Kconfig b/src/mainboard/traverse/geos/Kconfig
index dd6c8dd9fa..40679fe1f1 100644
--- a/src/mainboard/traverse/geos/Kconfig
+++ b/src/mainboard/traverse/geos/Kconfig
@@ -3,7 +3,7 @@ if BOARD_TRAVERSE_GEOS
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select ARCH_X86
- select CPU_AMD_LX
+ select CPU_AMD_GEODE_LX
select NORTHBRIDGE_AMD_LX
select SOUTHBRIDGE_AMD_CS5536
select HAVE_PIRQ_TABLE
diff --git a/src/mainboard/traverse/geos/devicetree.cb b/src/mainboard/traverse/geos/devicetree.cb
index eab70c7c78..44b36f68c2 100644
--- a/src/mainboard/traverse/geos/devicetree.cb
+++ b/src/mainboard/traverse/geos/devicetree.cb
@@ -33,7 +33,7 @@ chip northbridge/amd/lx
end
# APIC cluster is late CPU init.
device lapic_cluster 0 on
- chip cpu/amd/model_lx
+ chip cpu/amd/geode_lx
device lapic 0 on end
end
end
diff --git a/src/mainboard/traverse/geos/romstage.c b/src/mainboard/traverse/geos/romstage.c
index 80a95579d1..588681bfbb 100644
--- a/src/mainboard/traverse/geos/romstage.c
+++ b/src/mainboard/traverse/geos/romstage.c
@@ -47,9 +47,9 @@ static inline int spd_read_byte(unsigned int device, unsigned int address)
#include "northbridge/amd/lx/pll_reset.c"
#include "northbridge/amd/lx/raminit.c"
#include "lib/generic_sdram.c"
-#include "cpu/amd/model_lx/cpureginit.c"
-#include "cpu/amd/model_lx/syspreinit.c"
-#include "cpu/amd/model_lx/msrinit.c"
+#include "cpu/amd/geode_lx/cpureginit.c"
+#include "cpu/amd/geode_lx/syspreinit.c"
+#include "cpu/amd/geode_lx/msrinit.c"
void main(unsigned long bist)
{