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-rw-r--r--src/mainboard/system76/gaze16/variants/3050/overridetree.cb2
-rw-r--r--src/mainboard/system76/gaze16/variants/3060/overridetree.cb2
2 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/system76/gaze16/variants/3050/overridetree.cb b/src/mainboard/system76/gaze16/variants/3050/overridetree.cb
index 73520b5dc8..c26b7d2fed 100644
--- a/src/mainboard/system76/gaze16/variants/3050/overridetree.cb
+++ b/src/mainboard/system76/gaze16/variants/3050/overridetree.cb
@@ -62,6 +62,7 @@ chip soc/intel/tigerlake
register "PcieRpLtrEnable[7]" = "1"
register "PcieClkSrcUsage[8]" = "7"
register "PcieClkSrcClkReq[8]" = "8"
+ register "PcieRpSlotImplemented[7]" = "1"
end
device ref pcie_rp9 on
# PCIe root port #9 x4, Clock 9 (SSD1)
@@ -69,6 +70,7 @@ chip soc/intel/tigerlake
register "PcieRpLtrEnable[8]" = "1"
register "PcieClkSrcUsage[9]" = "8"
register "PcieClkSrcClkReq[9]" = "9"
+ register "PcieRpSlotImplemented[8]" = "1"
end
end
end
diff --git a/src/mainboard/system76/gaze16/variants/3060/overridetree.cb b/src/mainboard/system76/gaze16/variants/3060/overridetree.cb
index 044df55457..7d5549935c 100644
--- a/src/mainboard/system76/gaze16/variants/3060/overridetree.cb
+++ b/src/mainboard/system76/gaze16/variants/3060/overridetree.cb
@@ -62,6 +62,7 @@ chip soc/intel/tigerlake
register "PcieRpLtrEnable[7]" = "1"
register "PcieClkSrcUsage[2]" = "7"
register "PcieClkSrcClkReq[2]" = "2"
+ register "PcieRpSlotImplemented[7]" = "1"
end
device ref pcie_rp9 on
# PCIe root port #9 x4, Clock 10 (SSD2)
@@ -69,6 +70,7 @@ chip soc/intel/tigerlake
register "PcieRpLtrEnable[8]" = "1"
register "PcieClkSrcUsage[10]" = "8"
register "PcieClkSrcClkReq[10]" = "10"
+ register "PcieRpSlotImplemented[8]" = "1"
end
device ref gbe on end
end