diff options
Diffstat (limited to 'src/mainboard/system76/cml-u/variants/lemp9/overridetree.cb')
-rw-r--r-- | src/mainboard/system76/cml-u/variants/lemp9/overridetree.cb | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/mainboard/system76/cml-u/variants/lemp9/overridetree.cb b/src/mainboard/system76/cml-u/variants/lemp9/overridetree.cb index 2279cb33cb..effe2805fe 100644 --- a/src/mainboard/system76/cml-u/variants/lemp9/overridetree.cb +++ b/src/mainboard/system76/cml-u/variants/lemp9/overridetree.cb @@ -4,7 +4,7 @@ chip soc/intel/cannonlake device domain 0 on subsystemid 0x1558 0x1401 inherit - device pci 14.0 on # USB xHCI + device ref xhci on register "usb2_ports" = "{ [0] = USB2_PORT_MID(OC_SKIP), /* Type-A port 1 */ [1] = USB2_PORT_TYPE_C(OC_SKIP), /* Type-C port 2 */ @@ -18,7 +18,7 @@ chip soc/intel/cannonlake [2] = USB3_PORT_DEFAULT(OC_SKIP), /* Type-A port 3 */ }" end - device pci 15.0 on # I2C #0 + device ref i2c0 on chip drivers/i2c/hid register "generic.hid" = ""ELAN040D"" register "generic.desc" = ""ELAN Touchpad"" @@ -28,7 +28,7 @@ chip soc/intel/cannonlake device i2c 15 on end end end - device pci 17.0 on # SATA + device ref sata on register "SataSalpSupport" = "1" register "SataPortsEnable" = "{ [1] = 1, /* Port 2 (J_SSD2) */ @@ -39,7 +39,7 @@ chip soc/intel/cannonlake [2] = 1, /* Port 3 (J_SSD1) */ }" end - device pci 1c.5 on # PCI Express Port 6 + device ref pcie_rp6 on device pci 00.0 on end # x1 Card reader register "PcieRpEnable[5]" = "1" register "PcieRpLtrEnable[5]" = "1" @@ -47,7 +47,7 @@ chip soc/intel/cannonlake register "PcieClkSrcClkReq[3]" = "3" register "PcieRpSlotImplemented[5]" = "1" end - device pci 1c.7 on # PCI Express Port 8 + device ref pcie_rp8 on device pci 00.0 on end # x1 M.2/E 2230 (J_WLAN1) register "PcieRpEnable[7]" = "1" register "PcieRpLtrEnable[7]" = "1" @@ -59,7 +59,7 @@ chip soc/intel/cannonlake end smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "M.2/E 2230 (J_WLAN1)" "SlotDataBusWidth1X" end - device pci 1d.0 on # PCI Express Port 9 + device ref pcie_rp9 on device pci 00.0 on end # x4 M.2/M 2280 (J_SSD2) register "PcieRpEnable[8]" = "1" register "PcieRpLtrEnable[8]" = "1" @@ -68,7 +68,7 @@ chip soc/intel/cannonlake register "PcieRpSlotImplemented[8]" = "1" smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD2)" "SlotDataBusWidth4X" end - device pci 1d.4 on # PCI Express Port 13 + device ref pcie_rp13 on device pci 00.0 on end # x4 M.2/M 2280 (J_SSD1) register "PcieRpEnable[12]" = "1" register "PcieRpLtrEnable[12]" = "1" |