diff options
Diffstat (limited to 'src/mainboard/supermicro')
-rw-r--r-- | src/mainboard/supermicro/h8dme/romstage.c | 2 | ||||
-rw-r--r-- | src/mainboard/supermicro/h8dmr/romstage.c | 2 | ||||
-rw-r--r-- | src/mainboard/supermicro/h8dmr_fam10/romstage.c | 2 | ||||
-rw-r--r-- | src/mainboard/supermicro/h8qme_fam10/romstage.c | 2 |
4 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/supermicro/h8dme/romstage.c b/src/mainboard/supermicro/h8dme/romstage.c index 3edd0930f0..ef78450ce3 100644 --- a/src/mainboard/supermicro/h8dme/romstage.c +++ b/src/mainboard/supermicro/h8dme/romstage.c @@ -185,7 +185,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) } #endif - init_timer(); /* Need to use TMICT to synconize FID/VID. */ + init_timer(); /* Need to use TMICT to synchronize FID/VID. */ needs_reset |= optimize_link_coherent_ht(); needs_reset |= optimize_link_incoherent_ht(sysinfo); diff --git a/src/mainboard/supermicro/h8dmr/romstage.c b/src/mainboard/supermicro/h8dmr/romstage.c index 1675427c74..e87b84507c 100644 --- a/src/mainboard/supermicro/h8dmr/romstage.c +++ b/src/mainboard/supermicro/h8dmr/romstage.c @@ -162,7 +162,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) } #endif - init_timer(); // Need to use TMICT to synconize FID/VID + init_timer(); // Need to use TMICT to synchronize FID/VID needs_reset |= optimize_link_coherent_ht(); needs_reset |= optimize_link_incoherent_ht(sysinfo); diff --git a/src/mainboard/supermicro/h8dmr_fam10/romstage.c b/src/mainboard/supermicro/h8dmr_fam10/romstage.c index d185653d83..bc1ca24334 100644 --- a/src/mainboard/supermicro/h8dmr_fam10/romstage.c +++ b/src/mainboard/supermicro/h8dmr_fam10/romstage.c @@ -199,7 +199,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) msr.hi, msr.lo); #endif - init_timer(); // Need to use TMICT to synconize FID/VID + init_timer(); // Need to use TMICT to synchronize FID/VID wants_reset = mcp55_early_setup_x(); diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c index 72ca8b68c0..2be09bccac 100644 --- a/src/mainboard/supermicro/h8qme_fam10/romstage.c +++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c @@ -263,7 +263,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) printk(BIOS_DEBUG, "End FIDVIDMSR 0xc0010071 0x%08x 0x%08x\n", msr.hi, msr.lo); #endif - init_timer(); // Need to use TMICT to synconize FID/VID + init_timer(); // Need to use TMICT to synchronize FID/VID wants_reset = mcp55_early_setup_x(); |