diff options
Diffstat (limited to 'src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f')
| -rw-r--r-- | src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/overridetree.cb | 51 |
1 files changed, 26 insertions, 25 deletions
diff --git a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/overridetree.cb b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/overridetree.cb index 98bfb04fb3..4063bedde3 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/overridetree.cb +++ b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/overridetree.cb @@ -15,32 +15,33 @@ chip soc/intel/skylake # This board has an IGD with no output. register "PrimaryDisplay" = "Display_Auto" - register "usb2_ports" = "{ - [0] = USB2_PORT_MID(OC0), /* USB 2 */ - [1] = USB2_PORT_MID(OC0), /* USB 3 */ - [2] = USB2_PORT_MID(OC1), /* USB 4 */ - [3] = USB2_PORT_MID(OC1), /* USB 5 */ - [4] = USB2_PORT_MID(OC2), /* USB 0 */ - [5] = USB2_PORT_MID(OC2), /* USB 1 */ - [8] = USB2_PORT_MID(OC3), /* USB 9 (3.0) */ - [9] = USB2_PORT_MID(OC5), /* USB 8 (3.0) */ - [10] = USB2_PORT_MID(OC4), /* USB 6 (3.0) */ - [11] = USB2_PORT_MID(OC4), /* USB 7 (3.0) */ - [12] = USB2_PORT_MID(OC3), /* USB 10 (3.0) */ - [13] = USB2_PORT_MID(OC_SKIP), /* IPMI USB hub */ - [14] = USB2_PORT_MID(OC0), /* Unknown */ - [15] = USB2_PORT_MID(OC0), /* Unknown */ - }" - - register "usb3_ports" = "{ - [0] = USB3_PORT_DEFAULT(OC5), /* USB 8 */ - [1] = USB3_PORT_DEFAULT(OC4), /* USB 6 */ - [2] = USB3_PORT_DEFAULT(OC4), /* USB 7 */ - [3] = USB3_PORT_DEFAULT(OC3), /* USB 9 */ - [4] = USB3_PORT_DEFAULT(OC3), /* USB 10 */ - }" - device domain 0 on + device ref south_xhci on + register "usb2_ports" = "{ + [0] = USB2_PORT_MID(OC0), /* USB 2 */ + [1] = USB2_PORT_MID(OC0), /* USB 3 */ + [2] = USB2_PORT_MID(OC1), /* USB 4 */ + [3] = USB2_PORT_MID(OC1), /* USB 5 */ + [4] = USB2_PORT_MID(OC2), /* USB 0 */ + [5] = USB2_PORT_MID(OC2), /* USB 1 */ + [8] = USB2_PORT_MID(OC3), /* USB 9 (3.0) */ + [9] = USB2_PORT_MID(OC5), /* USB 8 (3.0) */ + [10] = USB2_PORT_MID(OC4), /* USB 6 (3.0) */ + [11] = USB2_PORT_MID(OC4), /* USB 7 (3.0) */ + [12] = USB2_PORT_MID(OC3), /* USB 10 (3.0) */ + [13] = USB2_PORT_MID(OC_SKIP), /* IPMI USB hub */ + [14] = USB2_PORT_MID(OC0), /* Unknown */ + [15] = USB2_PORT_MID(OC0), /* Unknown */ + }" + + register "usb3_ports" = "{ + [0] = USB3_PORT_DEFAULT(OC5), /* USB 8 */ + [1] = USB3_PORT_DEFAULT(OC4), /* USB 6 */ + [2] = USB3_PORT_DEFAULT(OC4), /* USB 7 */ + [3] = USB3_PORT_DEFAULT(OC3), /* USB 9 */ + [4] = USB3_PORT_DEFAULT(OC3), /* USB 10 */ + }" + end device ref peg0 on # Slot JPCIE3 smbios_slot_desc "SlotTypePciExpressGen3X16" "SlotLengthShort" "CPU SLOT6 PCI-E 3.0 X8(IN X16)" "SlotDataBusWidth8X" |