diff options
Diffstat (limited to 'src/mainboard/sunw/ultra40')
| -rw-r--r-- | src/mainboard/sunw/ultra40/Kconfig | 130 | ||||
| -rw-r--r-- | src/mainboard/sunw/ultra40/Makefile.inc | 81 |
2 files changed, 211 insertions, 0 deletions
diff --git a/src/mainboard/sunw/ultra40/Kconfig b/src/mainboard/sunw/ultra40/Kconfig new file mode 100644 index 0000000000..8cdd1f7da9 --- /dev/null +++ b/src/mainboard/sunw/ultra40/Kconfig @@ -0,0 +1,130 @@ +config BOARD_SUNW_ULTRA40 + bool "Ultra40" + select ARCH_X86 + select CPU_AMD_K8 + select CPU_AMD_SOCKET_940 + select NORTHBRIDGE_AMD_AMDK8 + select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX + select SOUTHBRIDGE_NVIDIA_CK804 + select SUPERIO_SMSC_LPC47M10X + select HAVE_PIRQ_TABLE + select USE_PRINTK_IN_CAR + select USE_DCACHE_RAM + help + Sun Ultra40. + +config MAINBOARD_DIR + string + default sunw/ultra40 + depends on BOARD_SUNW_ULTRA40 + +config DCACHE_RAM_BASE + hex + default 0xcf000 + depends on BOARD_SUNW_ULTRA40 + +config DCACHE_RAM_SIZE + hex + default 0x01000 + depends on BOARD_SUNW_ULTRA40 + +config APIC_ID_OFFSET + hex + default 0x10 + depends on BOARD_SUNW_ULTRA40 + +config HAVE_HARD_RESET + bool + default y + depends on BOARD_SUNW_ULTRA40 + +config IOAPIC + bool + default y + depends on BOARD_SUNW_ULTRA40 + +config K8_REV_F_SUPPORT + bool + default n + depends on BOARD_SUNW_ULTRA40 + +config SB_HT_CHAIN_ON_BUS0 + int + default 2 + depends on BOARD_SUNW_ULTRA40 + +config SB_HT_CHAIN_UNITID_OFFSET_ONLY + bool + default n + depends on BOARD_SUNW_ULTRA40 + +config LB_CKS_RANGE_END + int + default 122 + depends on BOARD_SUNW_ULTRA40 + +config LB_CKS_LOC + int + default 123 + depends on BOARD_SUNW_ULTRA40 + +config MAINBOARD_PART_NUMBER + string + default "ultra40" + depends on BOARD_SUNW_ULTRA40 + +config HW_MEM_HOLE_SIZEK + hex + default 0x100000 + depends on BOARD_SUNW_ULTRA40 + +config HAVE_FAILOVER_BOOT + bool + default n + depends on BOARD_SUNW_ULTRA40 + +config USE_FAILOVER_IMAGE + bool + default n + depends on BOARD_SUNW_ULTRA40 + +config MAX_CPUS + int + default 4 + depends on BOARD_SUNW_ULTRA40 + +config MAX_PHYSICAL_CPUS + int + default 2 + depends on BOARD_SUNW_ULTRA40 + +config HT_CHAIN_END_UNITID_BASE + hex + default 0x0 + depends on BOARD_SUNW_ULTRA40 + +config HT_CHAIN_UNITID_BASE + hex + default 0x0 + depends on BOARD_SUNW_ULTRA40 + +config USE_INIT + bool + default n + depends on BOARD_SUNW_ULTRA40 + +config SB_HT_CHAIN_ON_BUS0 + int + default 2 + depends on BOARD_SUNW_ULTRA40 + +config CONSOLE_VGA + bool + default y + depends on BOARD_SUNW_ULTRA40 + +config PCI_ROM_RUN + bool + default y + depends on BOARD_SUNW_ULTRA40 + diff --git a/src/mainboard/sunw/ultra40/Makefile.inc b/src/mainboard/sunw/ultra40/Makefile.inc new file mode 100644 index 0000000000..39f12d34c8 --- /dev/null +++ b/src/mainboard/sunw/ultra40/Makefile.inc @@ -0,0 +1,81 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2007-2008 coresystems GmbH +## +## This program is free software; you can redistribute it and/or +## modify it under the terms of the GNU General Public License as +## published by the Free Software Foundation; version 2 of +## the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, +## MA 02110-1301 USA +## + +driver-y += mainboard.o + +# Needed by irq_tables and mptable and acpi_tables. +obj-y += get_bus_conf.o +obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o +obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o + +# This is part of the conversion to init-obj and away from included code. + +initobj-y += crt0.o +# FIXME in $(top)/Makefile +crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc +crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc +crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc +crt0-y += ../../../../src/arch/i386/lib/id.inc +crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc +crt0-y += auto.inc + +ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb +ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds +ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds +ldscript-y += ../../../../src/arch/i386/lib/id.lds +ldscript-y += ../../../../src/arch/i386/lib/failover.lds + +ifdef POST_EVALUATION + +MAINBOARD_OPTIONS=\ + -DCONFIG_AP_IN_SIPI_WAIT=0 \ + -DCONFIG_USE_PRINTK_IN_CAR=1 \ + -DCONFIG_HAVE_HIGH_TABLES=1 + +$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/dsdt_lb.dsl + iasl -p dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dx/dsdt_lb.dsl + mv dsdt.hex $@ + +$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c + $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@ + +$(obj)/ssdt2.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci2.asl + iasl -p $(CURDIR)/pci2 -tc $(CONFIG_MAINBOARD)/dx/pci2.asl + perl -pi -e 's/AmlCode/AmlCode_ssdt2/g' pci2.hex + mv pci2.hex ssdt2.c + +$(obj)/ssdt3.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci3.asl" + iasl -p $(CURDIR)/pci3 -tc $(CONFIG_MAINBOARD)/ + perl -pi -e 's/AmlCode/AmlCode_ssdt3/g' pci3.hex + mv pci3.hex ssdt3.c + +$(obj)/ssdt4.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci4.asl" + iasl -p $(CURDIR)/pci4 -tc $(CONFIG_MAINBOARD)/dx/pci4.asl + perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' pci4.hex + mv pci4.hex ssdt4.c + +$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h + $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@ + perl -e 's/\.rodata/.rom.data/g' -pi $@ + perl -e 's/\.text/.section .rom.text/g' -pi $@ + +endif + |