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Diffstat (limited to 'src/mainboard/sapphire/pureplatinumh61')
-rw-r--r--src/mainboard/sapphire/pureplatinumh61/devicetree.cb1
-rw-r--r--src/mainboard/sapphire/pureplatinumh61/early_init.c7
2 files changed, 1 insertions, 7 deletions
diff --git a/src/mainboard/sapphire/pureplatinumh61/devicetree.cb b/src/mainboard/sapphire/pureplatinumh61/devicetree.cb
index 9e6789df3a..87d1532df9 100644
--- a/src/mainboard/sapphire/pureplatinumh61/devicetree.cb
+++ b/src/mainboard/sapphire/pureplatinumh61/devicetree.cb
@@ -1,6 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-or-later
chip northbridge/intel/sandybridge
+ register "spd_addresses" = "{0x50, 0, 0x51, 0}"
device domain 0 on
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
register "gen1_dec" = "0x000c0291"
diff --git a/src/mainboard/sapphire/pureplatinumh61/early_init.c b/src/mainboard/sapphire/pureplatinumh61/early_init.c
index f2ab137c0f..8749e49925 100644
--- a/src/mainboard/sapphire/pureplatinumh61/early_init.c
+++ b/src/mainboard/sapphire/pureplatinumh61/early_init.c
@@ -2,7 +2,6 @@
#include <device/pci_ops.h>
#include <device/pci_def.h>
-#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
void mainboard_pch_lpc_setup(void)
@@ -26,9 +25,3 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
{ 1, 0, 5 },
{ 1, 0, 6 },
};
-
-void mainboard_get_spd(spd_raw_data *spd, bool id_only)
-{
- read_spd(&spd[0], 0x50, id_only);
- read_spd(&spd[2], 0x51, id_only);
-}