diff options
Diffstat (limited to 'src/mainboard/samsung/lumpy')
| -rw-r--r-- | src/mainboard/samsung/lumpy/chromeos.c | 12 | ||||
| -rw-r--r-- | src/mainboard/samsung/lumpy/onboard.h | 4 |
2 files changed, 12 insertions, 4 deletions
diff --git a/src/mainboard/samsung/lumpy/chromeos.c b/src/mainboard/samsung/lumpy/chromeos.c index c6cdd668b7..22b936c839 100644 --- a/src/mainboard/samsung/lumpy/chromeos.c +++ b/src/mainboard/samsung/lumpy/chromeos.c @@ -19,9 +19,6 @@ void fill_lb_gpios(struct lb_gpios *gpios) { - const pci_devfn_t dev = PCI_DEV(0, 0x1f, 0); - u16 gen_pmcon_1 = pci_s_read_config32(dev, GEN_PMCON_1); - struct lb_gpio chromeos_gpios[] = { /* Recovery: GPIO42 = CHP3_REC_MODE# */ {GPIO_REC_MODE, ACTIVE_LOW, !get_recovery_mode_switch(), @@ -30,7 +27,7 @@ void fill_lb_gpios(struct lb_gpios *gpios) {100, ACTIVE_HIGH, get_lid_switch(), "lid"}, /* Power Button */ - {101, ACTIVE_LOW, (gen_pmcon_1 >> 9) & 1, "power"}, + {101, ACTIVE_LOW, get_power_switch(), "power"}, /* Did we load the VGA Option ROM? */ /* -1 indicates that this is a pseudo GPIO */ @@ -54,6 +51,13 @@ int get_lid_switch(void) return ec_read(0x83) & 1; } +int get_power_switch(void) +{ + const pci_devfn_t dev = PCI_DEV(0, 0x1f, 0); + u16 gen_pmcon_1 = pci_s_read_config32(dev, GEN_PMCON_1); + return (gen_pmcon_1 >> 9) & 1; +} + int get_write_protect_state(void) { const pci_devfn_t dev = PCI_DEV(0, 0x1f, 2); diff --git a/src/mainboard/samsung/lumpy/onboard.h b/src/mainboard/samsung/lumpy/onboard.h index d43e1bae77..dd570762e2 100644 --- a/src/mainboard/samsung/lumpy/onboard.h +++ b/src/mainboard/samsung/lumpy/onboard.h @@ -18,4 +18,8 @@ /* Recovery: GPIO42 = CHP3_REC_MODE#, active low */ #define GPIO_REC_MODE 42 +#ifndef __ACPI__ +int get_power_switch(void); +#endif + #endif |