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Diffstat (limited to 'src/mainboard/razer/blade_stealth_kbl/devicetree.cb')
-rw-r--r--src/mainboard/razer/blade_stealth_kbl/devicetree.cb21
1 files changed, 0 insertions, 21 deletions
diff --git a/src/mainboard/razer/blade_stealth_kbl/devicetree.cb b/src/mainboard/razer/blade_stealth_kbl/devicetree.cb
index 132316481d..380bfde2b7 100644
--- a/src/mainboard/razer/blade_stealth_kbl/devicetree.cb
+++ b/src/mainboard/razer/blade_stealth_kbl/devicetree.cb
@@ -126,24 +126,6 @@ chip soc/intel/skylake
register "PcieRpHotPlug[4]" = "1"
- register "usb2_ports" = "{
- [0] = USB2_PORT_MID(OC1), /* Type-A Port (right) */
- [1] = USB2_PORT_MID(OC1), /* Type-A Port (left) */
- [2] = USB2_PORT_MID(OC1), /* TODO Unknown. Maybe USBC? */
- [3] = USB2_PORT_MID(OC1), /* TODO Unknown. Maybe USBC? */
- [4] = USB2_PORT_MID(OC1), /* TODO Unknown. Maybe USBC? */
- [5] = USB2_PORT_MID(OC1), /* TODO Unknown. Maybe USBC? */
- [6] = USB2_PORT_FLEX(OC2), /* Camera */
- [7] = USB2_PORT_FLEX(OC2), /* Keyboard */
- [8] = USB2_PORT_FLEX(OC2), /* Touchscreen */
- }"
-
- register "usb3_ports" = "{
- [0] = USB3_PORT_DEFAULT(OC1), /* Type-A Port (left) */
- [1] = USB3_PORT_DEFAULT(OC1), /* Type-A Port (right) */
- [5] = USB3_PORT_DEFAULT(OC1), /* TODO Unknown. Maybe USBC? */
- }"
-
# PL1 override 25W
# PL2 override 44W
register "power_limits_config" = "{
@@ -191,9 +173,6 @@ chip soc/intel/skylake
device ref pcie_rp5 on end
device ref pcie_rp9 on end
device ref lpc_espi on
- chip drivers/pc80/tpm
- device pnp 0c31.0 on end
- end
chip superio/ite/it8528e
device pnp 6e.1 off end
device pnp 6e.2 off end