diff options
Diffstat (limited to 'src/mainboard/purism')
4 files changed, 4 insertions, 6 deletions
diff --git a/src/mainboard/purism/librem_bdw/devicetree.cb b/src/mainboard/purism/librem_bdw/devicetree.cb index e8a03a3f6b..60a06f47c2 100644 --- a/src/mainboard/purism/librem_bdw/devicetree.cb +++ b/src/mainboard/purism/librem_bdw/devicetree.cb @@ -9,6 +9,8 @@ chip soc/intel/broadwell # Enable DDI1 Hotplug with 6ms pulse register "gpu_dp_b_hotplug" = "0x06" + register "ec_present" = "true" + register "panel_cfg" = "{ .up_delay_ms = 200, .down_delay_ms = 50, diff --git a/src/mainboard/purism/librem_bdw/variants/librem13v1/pei_data.c b/src/mainboard/purism/librem_bdw/variants/librem13v1/pei_data.c index 0025617146..04fb9ea9e1 100644 --- a/src/mainboard/purism/librem_bdw/variants/librem13v1/pei_data.c +++ b/src/mainboard/purism/librem_bdw/variants/librem13v1/pei_data.c @@ -11,8 +11,6 @@ void mainboard_fill_spd_data(struct pei_data *pei_data) void mainboard_fill_pei_data(struct pei_data *pei_data) { - pei_data->ec_present = 1; - /* P1: Left Side Port (USB2 only) */ pei_data_usb2_port(pei_data, 0, 0x0080, 1, USB_OC_PIN_SKIP, USB_PORT_BACK_PANEL); /* P2: Right Side Port (USB2) */ diff --git a/src/mainboard/purism/librem_bdw/variants/librem15v2/overridetree.cb b/src/mainboard/purism/librem_bdw/variants/librem15v2/overridetree.cb index d88c19c26a..76737cc5e2 100644 --- a/src/mainboard/purism/librem_bdw/variants/librem15v2/overridetree.cb +++ b/src/mainboard/purism/librem_bdw/variants/librem15v2/overridetree.cb @@ -1,5 +1,7 @@ chip soc/intel/broadwell + register "dq_pins_interleaved" = "true" + device domain 0 on chip soc/intel/broadwell/pch # Port 0 is HDD diff --git a/src/mainboard/purism/librem_bdw/variants/librem15v2/pei_data.c b/src/mainboard/purism/librem_bdw/variants/librem15v2/pei_data.c index 1cb7e756e7..209cf30248 100644 --- a/src/mainboard/purism/librem_bdw/variants/librem15v2/pei_data.c +++ b/src/mainboard/purism/librem_bdw/variants/librem15v2/pei_data.c @@ -5,8 +5,6 @@ void mainboard_fill_spd_data(struct pei_data *pei_data) { - pei_data->dq_pins_interleaved = 1; - /* One DIMM slot */ pei_data->spd_addresses[0] = 0xa0; pei_data->spd_addresses[2] = 0xa4; @@ -14,8 +12,6 @@ void mainboard_fill_spd_data(struct pei_data *pei_data) void mainboard_fill_pei_data(struct pei_data *pei_data) { - pei_data->ec_present = 1; - /* P1: Right Side Port (USB2) */ pei_data_usb2_port(pei_data, 0, 0x0080, 1, USB_OC_PIN_SKIP, USB_PORT_BACK_PANEL); /* P2: Right Side Port (USB2) */ |