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-rw-r--r--src/mainboard/msi/ms7260/romstage.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/msi/ms7260/romstage.c b/src/mainboard/msi/ms7260/romstage.c
index 846091a969..799c05e3c6 100644
--- a/src/mainboard/msi/ms7260/romstage.c
+++ b/src/mainboard/msi/ms7260/romstage.c
@@ -33,10 +33,10 @@
#endif
/* Used by init_cpus and fidvid. */
-#define K8_SET_FIDVID 1
+#define SET_FIDVID 1
/* If we want to wait for core1 done before DQS training, set it to 0. */
-#define K8_SET_FIDVID_CORE0_ONLY 1
+#define SET_FIDVID_CORE0_ONLY 1
#if CONFIG_K8_REV_F_SUPPORT == 1
#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
@@ -214,7 +214,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* Set up chains and store link pair for optimization later. */
ht_setup_chains_x(sysinfo); /* Init sblnk and sbbusn, nodes, sbdn. */
-#if K8_SET_FIDVID == 1
+#if SET_FIDVID == 1
{
msr_t msr = rdmsr(0xc0010042);
print_debug("begin msr fid, vid ");