aboutsummaryrefslogtreecommitdiff
path: root/src/mainboard/lippert/spacerunner-lx/Options.lb
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/lippert/spacerunner-lx/Options.lb')
-rw-r--r--src/mainboard/lippert/spacerunner-lx/Options.lb10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/lippert/spacerunner-lx/Options.lb b/src/mainboard/lippert/spacerunner-lx/Options.lb
index f0048739b6..5bb104bf9a 100644
--- a/src/mainboard/lippert/spacerunner-lx/Options.lb
+++ b/src/mainboard/lippert/spacerunner-lx/Options.lb
@@ -20,8 +20,8 @@
## Based on Options.lb from AMD's DB800 mainboard.
-uses CONFIG_HAVE_MP_TABLE
-uses CONFIG_HAVE_PIRQ_TABLE
+uses CONFIG_GENERATE_MP_TABLE
+uses CONFIG_GENERATE_PIRQ_TABLE
uses CONFIG_USE_FALLBACK_IMAGE
uses CONFIG_HAVE_FALLBACK_BOOT
uses CONFIG_HAVE_HARD_RESET
@@ -50,7 +50,7 @@ uses CONFIG_ROMBASE
uses CONFIG_RAMBASE
uses CONFIG_XIP_ROM_SIZE
uses CONFIG_XIP_ROM_BASE
-uses CONFIG_HAVE_MP_TABLE
+uses CONFIG_GENERATE_MP_TABLE
uses CONFIG_CROSS_COMPILE
uses CC
uses HOSTCC
@@ -91,7 +91,7 @@ default CONFIG_HAVE_FALLBACK_BOOT = 1
##
## no MP table
##
-default CONFIG_HAVE_MP_TABLE = 0
+default CONFIG_GENERATE_MP_TABLE = 0
##
## Build code to reset the motherboard from coreboot
@@ -106,7 +106,7 @@ default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1
##
## Build code to export a programmable irq routing table
##
-default CONFIG_HAVE_PIRQ_TABLE = 1
+default CONFIG_GENERATE_PIRQ_TABLE = 1
default CONFIG_IRQ_SLOT_COUNT = 7
default CONFIG_PIRQ_ROUTE = 1