diff options
Diffstat (limited to 'src/mainboard/lenovo/x200')
| -rw-r--r-- | src/mainboard/lenovo/x200/Kconfig | 18 | ||||
| -rw-r--r-- | src/mainboard/lenovo/x200/cmos.layout | 4 | ||||
| -rw-r--r-- | src/mainboard/lenovo/x200/vboot-rwa.fmd | 26 |
3 files changed, 48 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/x200/Kconfig b/src/mainboard/lenovo/x200/Kconfig index fab8a88a81..5e88c21c2f 100644 --- a/src/mainboard/lenovo/x200/Kconfig +++ b/src/mainboard/lenovo/x200/Kconfig @@ -24,6 +24,24 @@ config BOARD_SPECIFIC_OPTIONS select MAINBOARD_HAS_LIBGFXINIT select MAINBOARD_USES_IFD_GBE_REGION +config VBOOT + select VBOOT_VBNV_CMOS + select GBB_FLAG_DISABLE_LID_SHUTDOWN + select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC + select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC + select GBB_FLAG_DISABLE_FWMP + +config VBOOT_SLOTS_RW_A + default y + +config VBOOT_VBNV_OFFSET + hex + default 0x82 + +config FMDFILE + string + default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/vboot-rwa.fmd" if VBOOT + config MAINBOARD_DIR string default lenovo/x200 diff --git a/src/mainboard/lenovo/x200/cmos.layout b/src/mainboard/lenovo/x200/cmos.layout index 4a381462b6..ebae12d452 100644 --- a/src/mainboard/lenovo/x200/cmos.layout +++ b/src/mainboard/lenovo/x200/cmos.layout @@ -86,6 +86,10 @@ entries # RAM initialization internal data 1024 128 r 0 read_training_results +# VBOOT +1152 128 r 0 vbnv + + # ----------------------------------------------------------------- enumerations diff --git a/src/mainboard/lenovo/x200/vboot-rwa.fmd b/src/mainboard/lenovo/x200/vboot-rwa.fmd new file mode 100644 index 0000000000..4af3fcd2d6 --- /dev/null +++ b/src/mainboard/lenovo/x200/vboot-rwa.fmd @@ -0,0 +1,26 @@ +FLASH@0xff800000 0x800000 { + SI_ALL@0x0 0x600000 { + SI_DESC@0x0 0x1000 + SI_ME@0x1000 0x5f5000 + SI_GBE@0x5f6000 0x2000 + SI_PD@0x5f8000 0x8000 + } + SI_BIOS@0x600000 0x200000 { + RW_SECTION_A 0x100000 { + VBLOCK_A 0x10000 + FW_MAIN_A(CBFS) + RW_FWID_A 0x40 + } + RW_VPD(PRESERVE) 0x1000 + CONSOLE 0x10000 + SMMSTORE(PRESERVE) 0x40000 + WP_RO { + FMAP 0x800 + RO_FRID 0x40 + RO_PADDING 0x7c0 + RO_VPD(PRESERVE) 0x1000 + GBB 0x1e000 + COREBOOT(CBFS) + } + } +} |