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-rw-r--r--src/mainboard/lenovo/x131e/devicetree.cb1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/lenovo/x131e/devicetree.cb b/src/mainboard/lenovo/x131e/devicetree.cb
index dc9e0372e3..abe40b19dc 100644
--- a/src/mainboard/lenovo/x131e/devicetree.cb
+++ b/src/mainboard/lenovo/x131e/devicetree.cb
@@ -56,7 +56,6 @@ chip northbridge/intel/sandybridge
# Enable zero-based linear PCIe root port functions
register "pcie_port_coalesce" = "1"
- register "c2_latency" = "0x0065"
register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0x2005"