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-rw-r--r--src/mainboard/kontron/986lcd-m/romstage.c11
-rw-r--r--src/mainboard/kontron/kt690/romstage.c13
2 files changed, 2 insertions, 22 deletions
diff --git a/src/mainboard/kontron/986lcd-m/romstage.c b/src/mainboard/kontron/986lcd-m/romstage.c
index f974128604..20d80ee648 100644
--- a/src/mainboard/kontron/986lcd-m/romstage.c
+++ b/src/mainboard/kontron/986lcd-m/romstage.c
@@ -28,25 +28,19 @@
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <usbdebug.h>
-
#include "superio/winbond/w83627thg/w83627thg.h"
-
#include <pc80/mc146818rtc.h>
#include "option_table.h"
-
#include <console/console.h>
#include <cpu/x86/bist.h>
-
#include "superio/winbond/w83627thg/w83627thg_early_serial.c"
-
void enable_smbus(void);
-
-#define SERIAL_DEV PNP_DEV(0x2e, W83627THG_SP1)
-
#include "northbridge/intel/i945/i945.h"
#include "northbridge/intel/i945/raminit.h"
#include "southbridge/intel/i82801gx/i82801gx.h"
+#define SERIAL_DEV PNP_DEV(0x2e, W83627THG_SP1)
+
void setup_ich7_gpios(void)
{
printk(BIOS_DEBUG, " GPIOS...");
@@ -454,4 +448,3 @@ void main(unsigned long bist)
}
#endif
}
-
diff --git a/src/mainboard/kontron/kt690/romstage.c b/src/mainboard/kontron/kt690/romstage.c
index 29b2b1477a..d3586f225d 100644
--- a/src/mainboard/kontron/kt690/romstage.c
+++ b/src/mainboard/kontron/kt690/romstage.c
@@ -32,25 +32,19 @@
#include <cpu/x86/lapic.h>
#include <pc80/mc146818rtc.h>
#include <console/console.h>
-
#include <cpu/amd/model_fxx_rev.h>
#include "northbridge/amd/amdk8/raminit.h"
#include "cpu/amd/model_fxx/apic_timer.c"
#include "lib/delay.c"
#include <spd.h>
-
#include "cpu/x86/lapic/boot_cpu.c"
#include "northbridge/amd/amdk8/reset_test.c"
#include "northbridge/amd/amdk8/debug.c"
#include "superio/winbond/w83627dhg/w83627dhg_early_serial.c"
-
#include <usbdebug.h>
-
#include <cpu/amd/mtrr.h>
#include "cpu/x86/bist.h"
-
#include "northbridge/amd/amdk8/setup_resource_map.c"
-
#include "southbridge/amd/rs690/rs690_early_setup.c"
#include "southbridge/amd/sb600/sb600_early_setup.c"
@@ -76,16 +70,10 @@ static inline int spd_read_byte(u32 device, u32 address)
#include "northbridge/amd/amdk8/coherent_ht.c"
#include "lib/generic_sdram.c"
#include "resourcemap.c"
-
#include "cpu/amd/dualcore/dualcore.c"
-
-
#include "cpu/amd/car/post_cache_as_ram.c"
-
#include "cpu/amd/model_fxx/init_cpus.c"
-
#include "cpu/amd/model_fxx/fidvid.c"
-
#include "northbridge/amd/amdk8/early_ht.c"
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
@@ -191,4 +179,3 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_cache_as_ram();
}
-