diff options
Diffstat (limited to 'src/mainboard/jetway')
| -rw-r--r-- | src/mainboard/jetway/j7f24/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/jetway/pa78vm5/romstage.c | 5 |
2 files changed, 3 insertions, 4 deletions
diff --git a/src/mainboard/jetway/j7f24/romstage.c b/src/mainboard/jetway/j7f24/romstage.c index b0c14968b9..401fe67617 100644 --- a/src/mainboard/jetway/j7f24/romstage.c +++ b/src/mainboard/jetway/j7f24/romstage.c @@ -31,7 +31,7 @@ #include "cpu/x86/bist.h" #include "pc80/udelay_io.c" #include "lib/delay.c" -#include "southbridge/via/vt8237r/vt8237r_early_smbus.c" +#include "southbridge/via/vt8237r/early_smbus.c" #include "superio/fintek/f71805f/f71805f_early_serial.c" #include <lib.h> #include <spd.h> diff --git a/src/mainboard/jetway/pa78vm5/romstage.c b/src/mainboard/jetway/pa78vm5/romstage.c index 4711aecfdd..b5b9ab3d4b 100644 --- a/src/mainboard/jetway/pa78vm5/romstage.c +++ b/src/mainboard/jetway/pa78vm5/romstage.c @@ -48,8 +48,8 @@ #include "cpu/x86/mtrr/earlymtrr.c" #include <cpu/amd/mtrr.h> #include "northbridge/amd/amdfam10/setup_resource_map.c" -#include "southbridge/amd/rs780/rs780_early_setup.c" -#include "southbridge/amd/sb700/sb700_early_setup.c" +#include "southbridge/amd/rs780/early_setup.c" +#include "southbridge/amd/sb700/early_setup.c" #include "northbridge/amd/amdfam10/debug.c" #if CONFIG_TTYS0_BASE == 0x2f8 @@ -75,7 +75,6 @@ static int spd_read_byte(u32 device, u32 address) #include "cpu/amd/model_10xxx/update_microcode.c" #include "cpu/amd/model_10xxx/init_cpus.c" #include "northbridge/amd/amdfam10/early_ht.c" -#include "southbridge/amd/sb700/sb700_early_setup.c" #include <spd.h> void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) |