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-rw-r--r--src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcie.c1
-rw-r--r--src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h2
2 files changed, 1 insertions, 2 deletions
diff --git a/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcie.c b/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcie.c
index ad4934e348..cdeca0bf08 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcie.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcie.c
@@ -21,6 +21,7 @@
#include "PlatformGnbPcieComplex.h"
#include <string.h>
+#include <northbridge/amd/agesa/agesawrapper.h>
#include <vendorcode/amd/agesa/f14/Proc/CPU/heapManager.h>
#define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE
diff --git a/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h b/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h
index dd6f7d7c7d..0d1738edac 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h
+++ b/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h
@@ -79,6 +79,4 @@
#define GNB_GPP_PORT8_CHANNEL_TYPE 4
#define GNB_GPP_PORT8_HOTPLUG_SUPPORT 0
-void OemCustomizeInitEarly (IN OUT AMD_EARLY_PARAMS *InitEarly);
-
#endif /* _PLATFORM_GNB_PCIE_COMPLEX_H */