diff options
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r-- | src/mainboard/intel/d945gclf/devicetree.cb | 4 | ||||
-rw-r--r-- | src/mainboard/intel/dg41wv/devicetree.cb | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/intel/d945gclf/devicetree.cb b/src/mainboard/intel/d945gclf/devicetree.cb index 0238e04a48..5c72c72be9 100644 --- a/src/mainboard/intel/d945gclf/devicetree.cb +++ b/src/mainboard/intel/d945gclf/devicetree.cb @@ -36,8 +36,8 @@ chip northbridge/intel/i945 register "gpi13_routing" = "1" register "gpe0_en" = "0x20000601" - register "ide_enable_primary" = "0x1" - register "ide_enable_secondary" = "0x0" + register "ide_enable_primary" = "true" + register "ide_enable_secondary" = "false" register "c3_latency" = "85" register "p_cnt_throttling_supported" = "0" diff --git a/src/mainboard/intel/dg41wv/devicetree.cb b/src/mainboard/intel/dg41wv/devicetree.cb index 9e5c136bc2..641ada5fc8 100644 --- a/src/mainboard/intel/dg41wv/devicetree.cb +++ b/src/mainboard/intel/dg41wv/devicetree.cb @@ -50,7 +50,7 @@ chip northbridge/intel/x4x # Northbridge register "gpi14_routing" = "2" register "gpi15_routing" = "2" - register "ide_enable_primary" = "0x1" + register "ide_enable_primary" = "true" register "gpe0_en" = "0x440" register "gen1_dec" = "0x00fc0a01" # HWM |