diff options
Diffstat (limited to 'src/mainboard/intel')
5 files changed, 35 insertions, 13 deletions
diff --git a/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb b/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb index d5d806c91e..6bd90a55ac 100644 --- a/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb +++ b/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb @@ -72,11 +72,20 @@ chip soc/intel/cannonlake # Enable S0ix register "s0ix_enable" = "1" - # Audio - register "i2c[3]" = "{ - .speed = I2C_SPEED_STANDARD, - .rise_time_ns = 104, - .fall_time_ns = 52, + # Intel Common SoC Config + #+-------------------+---------------------------+ + #| Field | Value | + #+-------------------+---------------------------+ + #| chipset_lockdown | CHIPSET_LOCKDOWN_COREBOOT | + #| I2C3 | Audio | + #+-------------------+---------------------------+ + register "common_soc_config" = "{ + .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, + .i2c[3] = { + .speed = I2C_SPEED_STANDARD, + .rise_time_ns = 104, + .fall_time_ns = 52, + }, }" device domain 0 on diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb b/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb index 70b28bb62c..d3d0b00c8e 100644 --- a/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb +++ b/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb @@ -80,11 +80,18 @@ chip soc/intel/apollolake register "gpe0_dw2" = "PMC_GPE_N_95_64" register "gpe0_dw3" = "PMC_GPE_NW_31_0" - # Enable I2C0 for audio codec at 400kHz - register "i2c[0]" = "{ - .speed = I2C_SPEED_FAST, - .rise_time_ns = 104, - .fall_time_ns = 52, + # Intel Common SoC Config + #+-------------------+---------------------------+ + #| Field | Value | + #+-------------------+---------------------------+ + #| I2C0 | Audio | + #+-------------------+---------------------------+ + register "common_soc_config" = "{ + .i2c[0] = { + .speed = I2C_SPEED_FAST, + .rise_time_ns = 104, + .fall_time_ns = 52, + }, }" # Minimum SLP S3 assertion width 28ms. diff --git a/src/mainboard/intel/kblrvp/variants/rvp3/devicetree.cb b/src/mainboard/intel/kblrvp/variants/rvp3/devicetree.cb index 8751255076..1f5d1a7124 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp3/devicetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp3/devicetree.cb @@ -214,7 +214,9 @@ chip soc/intel/skylake register "VmxEnable" = "0" # Lock Down - register "chipset_lockdown" = "CHIPSET_LOCKDOWN_COREBOOT" + register "common_soc_config" = "{ + .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, + }" device cpu_cluster 0 on device lapic 0 on end diff --git a/src/mainboard/intel/kblrvp/variants/rvp7/devicetree.cb b/src/mainboard/intel/kblrvp/variants/rvp7/devicetree.cb index f07d38199f..efcf9be3b8 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp7/devicetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp7/devicetree.cb @@ -209,7 +209,9 @@ chip soc/intel/skylake register "sdcard_cd_gpio_default" = "GPP_G5" # Lock Down - register "chipset_lockdown" = "CHIPSET_LOCKDOWN_COREBOOT" + register "common_soc_config" = "{ + .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, + }" device cpu_cluster 0 on device lapic 0 on end diff --git a/src/mainboard/intel/kunimitsu/devicetree.cb b/src/mainboard/intel/kunimitsu/devicetree.cb index 44aa325bff..ffa259b7f6 100644 --- a/src/mainboard/intel/kunimitsu/devicetree.cb +++ b/src/mainboard/intel/kunimitsu/devicetree.cb @@ -193,7 +193,9 @@ chip soc/intel/skylake register "sdcard_cd_gpio_default" = "GPP_A7" # Lock Down - register "chipset_lockdown" = "CHIPSET_LOCKDOWN_COREBOOT" + register "common_soc_config" = "{ + .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, + }" device cpu_cluster 0 on device lapic 0 on end |