diff options
Diffstat (limited to 'src/mainboard/intel/sklrvp/gpio_rvp3.h')
| -rw-r--r-- | src/mainboard/intel/sklrvp/gpio_rvp3.h | 355 |
1 files changed, 355 insertions, 0 deletions
diff --git a/src/mainboard/intel/sklrvp/gpio_rvp3.h b/src/mainboard/intel/sklrvp/gpio_rvp3.h new file mode 100644 index 0000000000..b4daa11aab --- /dev/null +++ b/src/mainboard/intel/sklrvp/gpio_rvp3.h @@ -0,0 +1,355 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 Google Inc. + * Copyright (C) 2015 Intel Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ +#ifndef _GPIORVP3_H_ +#define _GPIORVP3_H_ + +#include <soc/gpio.h> + +static const GPIO_INIT_CONFIG GpioTableRvp3[] = { +{GPIO_LP_GPP_A8, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}}, +{GPIO_LP_GPP_A10, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermWpd20K}}, +{GPIO_LP_GPP_A11, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, + GpioOutDefault, GpioIntLevel | GpioIntApic, GpioResetDeep, + GpioTermNone}}, +{GPIO_LP_GPP_A12, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, + GpioOutHigh, GpioIntDis, GpioResetDeep, GpioTermNone}}, +{GPIO_LP_GPP_A13, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_A15, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermWpd20K}}, +{GPIO_LP_GPP_A16, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirIn, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_A17, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_A18, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_A19, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_A20, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_A21, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_A22, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, + GpioOutHigh, GpioIntDis, GpioResetDeep, GpioTermNone}}, +{GPIO_LP_GPP_A23, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, + GpioOutDefault, GpioIntLevel | GpioIntApic, GpioResetDeep, + GpioTermNone}}, +{GPIO_LP_GPP_B0, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}}, +{GPIO_LP_GPP_B1, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}}, +{GPIO_LP_GPP_B2, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}}, +{GPIO_LP_GPP_B3, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, + GpioOutDefault, GpioIntLevel | GpioIntApic, GpioResetDeep, + GpioTermNone}}, +{GPIO_LP_GPP_B4, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, + GpioOutHigh, GpioIntDis, GpioResetDeep, GpioTermNone}}, +{GPIO_LP_GPP_B5, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, + GpioOutDefault, GpioIntLevel | GpioIntApic, GpioResetDeep, + GpioTermNone}}, +{GPIO_LP_GPP_B11, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_B12, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_B13, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_B14, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, + GpioOutHigh, GpioIntDis, GpioResetDeep, GpioTermWpd20K}}, +{GPIO_LP_GPP_B15, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, + GpioOutLow, GpioIntDis, GpioResetDeep, GpioTermNone}}, +{GPIO_LP_GPP_B16, {GpioPadModeGpio, GpioHostOwnAcpi, GpioDirInInv, + GpioOutDefault, GpioIntLevel | GpioIntSci, GpioResetNormal, + GpioTermNone}}, +{GPIO_LP_GPP_B17, {GpioPadModeGpio, GpioHostOwnAcpi, GpioDirInInv, + GpioOutDefault, GpioIntEdge | GpioIntSci, GpioResetDeep, + GpioTermWpd20K}}, +{GPIO_LP_GPP_B18, {GpioPadModeGpio, GpioHostOwnAcpi, GpioDirInInv, + GpioOutDefault, GpioIntLevel | GpioIntSci, GpioResetNormal, + GpioTermWpu20K}}, +{GPIO_LP_GPP_B19, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}}, +{GPIO_LP_GPP_B20, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermWpd20K}}, +{GPIO_LP_GPP_B21, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermWpd20K}}, +{GPIO_LP_GPP_B22, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermWpd20K}}, +{GPIO_LP_GPP_B23, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, + GpioOutHigh, GpioIntDis, GpioResetDeep, GpioTermWpd20K}}, +{GPIO_LP_GPP_C0, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_C1, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermWpd20K}}, +{GPIO_LP_GPP_C2, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, + GpioOutHigh, GpioIntDis, GpioResetDeep, GpioTermWpd20K}}, +{GPIO_LP_GPP_C3, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_C4, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_C5, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirInInv, + GpioOutDefault, GpioIntLevel | GpioIntApic, GpioResetDeep, + GpioTermWpd20K}}, +{GPIO_LP_GPP_C6, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_C7, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermWpd20K}}, +{GPIO_LP_GPP_C8, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_C9, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_C10, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_C11, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_C12, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_C13, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_C14, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_C15, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_C16, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_C17, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_C18, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_C19, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_C20, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_C21, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_C22, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_C23, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_D0, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_D1, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_D2, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_D3, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_D4, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_D5, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_D6, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_D7, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_D8, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_D9, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, + GpioOutDefault, GpioIntLevel | GpioIntDis, GpioResetDeep, + GpioTermNone}}, +{GPIO_LP_GPP_D10, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, + GpioOutDefault, GpioIntLevel | GpioIntDis, GpioResetDeep, + GpioTermNone}}, +{GPIO_LP_GPP_D11, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, + GpioOutDefault, GpioIntLevel | GpioIntDis, GpioResetDeep, + GpioTermNone}}, +{GPIO_LP_GPP_D12, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, + GpioOutDefault, GpioIntLevel | GpioIntDis, GpioResetDeep, + GpioTermNone}}, +{GPIO_LP_GPP_D13, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_D14, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_D15, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_D16, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_D17, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_D18, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_D19, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_D20, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_D21, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_D22, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_D23, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_E0, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirInInv, + GpioOutDefault, GpioIntEdge | GpioIntApic, GpioResetDeep, + GpioTermNone}}, +{GPIO_LP_GPP_E1, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_E2, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntLvlEdgDis | GpioIntApic, GpioResetDeep, + GpioTermNone}}, +{GPIO_LP_GPP_E3, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirInOut, + GpioOutLow, GpioIntLevel | GpioIntDis, GpioResetDeep, + GpioTermNone}}, +{GPIO_LP_GPP_E4, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_E5, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_E6, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, + GpioOutLow, GpioIntDis, GpioResetDeep, GpioTermNone}}, +{GPIO_LP_GPP_E7, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, + GpioOutDefault, GpioIntLevel | GpioIntApic, GpioResetDeep, + GpioTermNone}}, +{GPIO_LP_GPP_E9, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_E10, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_E11, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_E12, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, + GpioOutDefault, GpioIntLevel | GpioIntDis, GpioResetDeep, + GpioTermNone}}, +{GPIO_LP_GPP_E13, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_E14, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_E15, {GpioPadModeGpio, GpioHostOwnAcpi, GpioDirInInv, + GpioOutDefault, GpioIntEdge | GpioIntSmi, GpioResetDeep, + GpioTermNone}}, +{GPIO_LP_GPP_E16, {GpioPadModeGpio, GpioHostOwnAcpi, GpioDirInInv, + GpioOutDefault, GpioIntLevel | GpioIntSci, GpioResetNormal, + GpioTermNone}}, +{GPIO_LP_GPP_E17, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_E18, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_E19, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermWpd20K}}, +{GPIO_LP_GPP_E20, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_E21, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermWpd20K}}, +{GPIO_LP_GPP_E22, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirInInv, + GpioOutDefault, GpioIntLevel | GpioIntApic, GpioResetDeep, + GpioTermNone}}, +{GPIO_LP_GPP_E23, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, + GpioOutHigh, GpioIntDis, GpioResetDeep, GpioTermWpd20K}}, +{GPIO_LP_GPP_F0, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_F1, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_F2, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_F3, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_F4, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep, + GpioTolerance1v8 | GpioTermNone}}, +{GPIO_LP_GPP_F5, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep, + GpioTolerance1v8 | GpioTermNone}}, +{GPIO_LP_GPP_F6, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep, + GpioTolerance1v8 | GpioTermNone}}, +{GPIO_LP_GPP_F7, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep, + GpioTolerance1v8 | GpioTermNone}}, +{GPIO_LP_GPP_F8, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep, + GpioTolerance1v8 | GpioTermNone}}, +{GPIO_LP_GPP_F9, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep, + GpioTolerance1v8 | GpioTermNone}}, +{GPIO_LP_GPP_F10, {GpioPadModeNative2, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep, + GpioTolerance1v8 | GpioTermNone}}, +{GPIO_LP_GPP_F11, {GpioPadModeNative2, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep, + GpioTolerance1v8 | GpioTermNone}}, +{GPIO_LP_GPP_F12, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_F13, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_F14, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_F15, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_F16, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_F17, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep,GpioTermNone}}, +{GPIO_LP_GPP_F18, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}}, +{GPIO_LP_GPP_F19, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}}, +{GPIO_LP_GPP_F20, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}}, +{GPIO_LP_GPP_F21, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}}, +{GPIO_LP_GPP_F22, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}}, +{GPIO_LP_GPP_F23, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, + GpioOutDefault, GpioIntLevel | GpioIntApic, GpioResetDeep, + GpioTermNone}}, +{GPIO_LP_GPP_G0, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}}, +{GPIO_LP_GPP_G1, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}}, +{GPIO_LP_GPP_G2, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}}, +{GPIO_LP_GPP_G3, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}}, +{GPIO_LP_GPP_G4, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}}, +{GPIO_LP_GPP_G5, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}}, +{GPIO_LP_GPP_G6, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}}, +{GPIO_LP_GPP_G7, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetDeep, GpioTermNone}}, +{GPIO_LP_GPD0, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetPwrGood, GpioTermNone}}, +{GPIO_LP_GPD1, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetPwrGood, GpioTermNone}}, +{GPIO_LP_GPD2, {GpioPadModeNative1, GpioHostOwnAcpi, GpioDirIn, + GpioOutDefault, GpioIntLevel | GpioIntSci, GpioResetPwrGood, + GpioTermNone}}, +{GPIO_LP_GPD3, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetPwrGood, GpioTermWpu20K}}, +{GPIO_LP_GPD4, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetPwrGood, GpioTermNone}}, +{GPIO_LP_GPD5, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetPwrGood, GpioTermNone}}, +{GPIO_LP_GPD6, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetPwrGood, GpioTermNone}}, +{GPIO_LP_GPD7, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetPwrGood, GpioTermNone}}, +{GPIO_LP_GPD8, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetPwrGood, GpioTermNone}}, +{GPIO_LP_GPD9, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetPwrGood, GpioTermNone}}, +{GPIO_LP_GPD10, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetPwrGood, GpioTermNone}}, +{GPIO_LP_GPD11, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetPwrGood, GpioTermNone}}, +{END_OF_GPIO_TABLE, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirNone, + GpioOutDefault, GpioIntDis, GpioResetPwrGood, GpioTermNone}}, +}; +#endif |