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Diffstat (limited to 'src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb')
-rw-r--r--src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb b/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb
index ab2c915488..de3b4dfb6f 100644
--- a/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb
+++ b/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb
@@ -130,7 +130,6 @@ chip soc/intel/alderlake
#+-------------------+---------------------------+
#| Field | Value |
#+-------------------+---------------------------+
- #| chipset_lockdown | CHIPSET_LOCKDOWN_COREBOOT |
#| GSPI0 | cr50 TPM. Early init is |
#| | required to set up a BAR |
#| | for TPM communication |
@@ -143,7 +142,6 @@ chip soc/intel/alderlake
#| I2C5 | Trackpad |
#+-------------------+---------------------------+
register "common_soc_config" = "{
- .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
.gspi[0] = {
.speed_mhz = 1,
.early_init = 1,