diff options
Diffstat (limited to 'src/mainboard/intel/saddlebrook')
| -rw-r--r-- | src/mainboard/intel/saddlebrook/devicetree.cb | 42 |
1 files changed, 21 insertions, 21 deletions
diff --git a/src/mainboard/intel/saddlebrook/devicetree.cb b/src/mainboard/intel/saddlebrook/devicetree.cb index fcd99ac610..c344819225 100644 --- a/src/mainboard/intel/saddlebrook/devicetree.cb +++ b/src/mainboard/intel/saddlebrook/devicetree.cb @@ -157,28 +157,28 @@ chip soc/intel/skylake # Must leave UART0 enabled or SD/eMMC will not work as PCI register "SataSalpSupport" = "1" - register "SataPortsEnable" = "{ \ - [0] = 1, \ - [1] = 1, \ - [2] = 1, \ - [3] = 1, \ - [4] = 1, \ - [5] = 1, \ - [6] = 1, \ - [7] = 1, \ + register "SataPortsEnable" = "{ + [0] = 1, + [1] = 1, + [2] = 1, + [3] = 1, + [4] = 1, + [5] = 1, + [6] = 1, + [7] = 1, }" - register "SerialIoDevMode" = "{ \ - [PchSerialIoIndexI2C0] = PchSerialIoPci, \ - [PchSerialIoIndexI2C1] = PchSerialIoPci, \ - [PchSerialIoIndexI2C2] = PchSerialIoPci, \ - [PchSerialIoIndexI2C3] = PchSerialIoPci, \ - [PchSerialIoIndexI2C4] = PchSerialIoPci, \ - [PchSerialIoIndexI2C5] = PchSerialIoPci, \ - [PchSerialIoIndexSpi0] = PchSerialIoPci, \ - [PchSerialIoIndexSpi1] = PchSerialIoPci, \ - [PchSerialIoIndexUart0] = PchSerialIoPci, \ - [PchSerialIoIndexUart1] = PchSerialIoPci, \ - [PchSerialIoIndexUart2] = PchSerialIoSkipInit, \ + register "SerialIoDevMode" = "{ + [PchSerialIoIndexI2C0] = PchSerialIoPci, + [PchSerialIoIndexI2C1] = PchSerialIoPci, + [PchSerialIoIndexI2C2] = PchSerialIoPci, + [PchSerialIoIndexI2C3] = PchSerialIoPci, + [PchSerialIoIndexI2C4] = PchSerialIoPci, + [PchSerialIoIndexI2C5] = PchSerialIoPci, + [PchSerialIoIndexSpi0] = PchSerialIoPci, + [PchSerialIoIndexSpi1] = PchSerialIoPci, + [PchSerialIoIndexUart0] = PchSerialIoPci, + [PchSerialIoIndexUart1] = PchSerialIoPci, + [PchSerialIoIndexUart2] = PchSerialIoSkipInit, }" # PL2 override 25W |