summaryrefslogtreecommitdiff
path: root/src/mainboard/intel/mohonpeak/Kconfig
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/intel/mohonpeak/Kconfig')
-rw-r--r--src/mainboard/intel/mohonpeak/Kconfig8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/intel/mohonpeak/Kconfig b/src/mainboard/intel/mohonpeak/Kconfig
index 8ea184b633..8f6e0773dc 100644
--- a/src/mainboard/intel/mohonpeak/Kconfig
+++ b/src/mainboard/intel/mohonpeak/Kconfig
@@ -71,10 +71,10 @@ config UART_FOR_CONSOLE
help
The Mohon Peak board uses COM2 (2f8) for the serial console.
-config SEABIOS_MALLOC_UPPERMEMORY
- bool
- default n
- help
+ config PAYLOAD_CONFIGFILE
+ string
+ default "$(top)/src/mainboard/$(MAINBOARDDIR)/config_seabios"
+ help
The Avoton/Rangeley chip does not allow devices to write into the 0xe000
segment. This means that USB/SATA devices will not work in SeaBIOS unless
we put the SeaBIOS buffer area down in the 0x9000 segment.