diff options
Diffstat (limited to 'src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb')
| -rw-r--r-- | src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb | 51 |
1 files changed, 27 insertions, 24 deletions
diff --git a/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb index 3a75b486be..f7baaa87d6 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb @@ -1,9 +1,10 @@ chip soc/intel/skylake - # SATA port 0 - register "SataPortsEnable[0]" = "1" - register "SataPortsEnable[1]" = "1" - register "SataPortsEnable[2]" = "1" + register "SataPortsEnable" = "{ + [0] = 1, + [1] = 1, + [2] = 1, + }" # Enable deep Sx states register "deep_s5_enable_ac" = "1" @@ -112,26 +113,28 @@ chip soc/intel/skylake # RP 9 uses CLK SRC 1# register "PcieRpClkSrcNumber[8]" = "1" - # USB 2.0 Enable all ports - register "usb2_ports[0]" = "USB2_PORT_MAX(OC0)" # TYPE-A Port - register "usb2_ports[1]" = "USB2_PORT_MAX(OC2)" # TYPE-A Port - register "usb2_ports[2]" = "USB2_PORT_MAX(OC_SKIP)" # Bluetooth - register "usb2_ports[4]" = "USB2_PORT_MAX(OC1)" # Type-A Port - register "usb2_ports[5]" = "USB2_PORT_MAX(OC_SKIP)" # TYPE-A Port - register "usb2_ports[6]" = "USB2_PORT_MAX(OC2)" # TYPE-A Port - register "usb2_ports[7]" = "USB2_PORT_MAX(OC2)" # TYPE-A Port - register "usb2_ports[8]" = "USB2_PORT_MAX(OC_SKIP)" # TYPE-A Port - register "usb2_ports[9]" = "USB2_PORT_MAX(OC_SKIP)" # TYPE-A Port - register "usb2_ports[10]" = "USB2_PORT_MAX(OC_SKIP)" # TYPE-A Port - register "usb2_ports[11]" = "USB2_PORT_MAX(OC_SKIP)" # TYPE-A Port - - # USB 3.0 Enable Port 1-4. Port 5 & 6 Disabled - register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)" # TYPE-A Port - register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # TYPE-A Port - register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # TYPE-A Port - register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC1)" # TYPE-A Port - register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC2)" # TYPE-A Port - register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC_SKIP)" # TYPE-A Port + register "usb2_ports" = "{ + [0] = USB2_PORT_MAX(OC0), /* TYPE-A Port */ + [1] = USB2_PORT_MAX(OC2), /* TYPE-A Port */ + [2] = USB2_PORT_MAX(OC_SKIP), /* Bluetooth */ + [4] = USB2_PORT_MAX(OC1), /* Type-A Port */ + [5] = USB2_PORT_MAX(OC_SKIP), /* TYPE-A Port */ + [6] = USB2_PORT_MAX(OC2), /* TYPE-A Port */ + [7] = USB2_PORT_MAX(OC2), /* TYPE-A Port */ + [8] = USB2_PORT_MAX(OC_SKIP), /* TYPE-A Port */ + [9] = USB2_PORT_MAX(OC_SKIP), /* TYPE-A Port */ + [10] = USB2_PORT_MAX(OC_SKIP), /* TYPE-A Port */ + [11] = USB2_PORT_MAX(OC_SKIP), /* TYPE-A Port */ + }" + + register "usb3_ports" = "{ + [0] = USB3_PORT_DEFAULT(OC0), /* TYPE-A Port */ + [1] = USB3_PORT_DEFAULT(OC_SKIP), /* TYPE-A Port */ + [2] = USB3_PORT_DEFAULT(OC_SKIP), /* TYPE-A Port */ + [3] = USB3_PORT_DEFAULT(OC1), /* TYPE-A Port */ + [4] = USB3_PORT_DEFAULT(OC2), /* TYPE-A Port */ + [5] = USB3_PORT_DEFAULT(OC_SKIP), /* TYPE-A Port */ + }" register "SerialIoDevMode" = "{ [PchSerialIoIndexI2C0] = PchSerialIoPci, |