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Diffstat (limited to 'src/mainboard/iei/pcisa-lx-800-r10/romstage.c')
-rw-r--r--src/mainboard/iei/pcisa-lx-800-r10/romstage.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c
index 80226a940d..f5fa9e9b0a 100644
--- a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c
+++ b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c
@@ -32,7 +32,6 @@
#include <cpu/amd/geode_post_code.h>
#include "southbridge/amd/cs5536/cs5536.h"
-#define POST_CODE(x) outb(x, 0x80)
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
#include "southbridge/amd/cs5536/cs5536_early_smbus.c"
@@ -102,7 +101,7 @@ static void mb_gpio_init(void)
void cache_as_ram_main(void)
{
- POST_CODE(0x01);
+ post_code(0x01);
static const struct mem_controller memctrl[] = {
{.channel0 = {(0xa << 3) | 0, (0xa << 3) | 1}}