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-rw-r--r--src/mainboard/hp/dl145_g1/romstage.c3
-rw-r--r--src/mainboard/hp/dl145_g3/Kconfig4
-rw-r--r--src/mainboard/hp/dl145_g3/romstage.c3
-rw-r--r--src/mainboard/hp/dl165_g6_fam10/Kconfig4
-rw-r--r--src/mainboard/hp/dl165_g6_fam10/romstage.c2
5 files changed, 3 insertions, 13 deletions
diff --git a/src/mainboard/hp/dl145_g1/romstage.c b/src/mainboard/hp/dl145_g1/romstage.c
index 97e1e30603..60ffb19fcd 100644
--- a/src/mainboard/hp/dl145_g1/romstage.c
+++ b/src/mainboard/hp/dl145_g1/romstage.c
@@ -101,8 +101,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
RC1|DIMM1, RC1|DIMM3, 0, 0,
#endif
};
- struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE
- + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
+ struct sys_info *sysinfo = &sysinfo_car;
int needs_reset = 0;
unsigned bsp_apicid = 0;
diff --git a/src/mainboard/hp/dl145_g3/Kconfig b/src/mainboard/hp/dl145_g3/Kconfig
index 6f491f278e..bee23f7553 100644
--- a/src/mainboard/hp/dl145_g3/Kconfig
+++ b/src/mainboard/hp/dl145_g3/Kconfig
@@ -34,10 +34,6 @@ config DCACHE_RAM_SIZE
hex
default 0x04000
-config DCACHE_RAM_GLOBAL_VAR_SIZE
- hex
- default 0x01000
-
config APIC_ID_OFFSET
hex
default 0x8
diff --git a/src/mainboard/hp/dl145_g3/romstage.c b/src/mainboard/hp/dl145_g3/romstage.c
index 7decb72a71..e3c397c57d 100644
--- a/src/mainboard/hp/dl145_g3/romstage.c
+++ b/src/mainboard/hp/dl145_g3/romstage.c
@@ -134,8 +134,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
DIMM5, DIMM7, 0, 0,
};
- struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE
- + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
+ struct sys_info *sysinfo = &sysinfo_car;
int needs_reset;
unsigned bsp_apicid = 0;
diff --git a/src/mainboard/hp/dl165_g6_fam10/Kconfig b/src/mainboard/hp/dl165_g6_fam10/Kconfig
index a1dd681144..32abeec96a 100644
--- a/src/mainboard/hp/dl165_g6_fam10/Kconfig
+++ b/src/mainboard/hp/dl165_g6_fam10/Kconfig
@@ -33,10 +33,6 @@ config DCACHE_RAM_SIZE
hex
default 0x0c000
-config DCACHE_RAM_GLOBAL_VAR_SIZE
- hex
- default 0x04000
-
config APIC_ID_OFFSET
hex
default 0
diff --git a/src/mainboard/hp/dl165_g6_fam10/romstage.c b/src/mainboard/hp/dl165_g6_fam10/romstage.c
index 443fa4e87b..c32728b497 100644
--- a/src/mainboard/hp/dl165_g6_fam10/romstage.c
+++ b/src/mainboard/hp/dl165_g6_fam10/romstage.c
@@ -101,7 +101,7 @@ static const u8 spd_addr[] = {
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
- struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
+ struct sys_info *sysinfo = &sysinfo_car;
u32 bsp_apicid = 0, val;
msr_t msr;