4 files changed, 2 insertions, 3 deletions
diff --git a/src/mainboard/hp/abm/Kconfig b/src/mainboard/hp/abm/Kconfig
index a179dbe8ca..9e35163180 100644
--- a/src/mainboard/hp/abm/Kconfig
+++ b/src/mainboard/hp/abm/Kconfig
@@ -22,6 +22,7 @@ config BOARD_SPECIFIC_OPTIONS
 	select CPU_AMD_AGESA_FAMILY16_KB
 	select NORTHBRIDGE_AMD_AGESA_FAMILY16_KB
 	select SOUTHBRIDGE_AMD_AGESA_YANGTZE
+	select DEFAULT_POST_ON_LPC
 	select SUPERIO_NUVOTON_NCT5104D
 	select HAVE_OPTION_TABLE
 	select HAVE_PIRQ_TABLE
diff --git a/src/mainboard/hp/abm/romstage.c b/src/mainboard/hp/abm/romstage.c
index 2cc8d1bead..d7322c9eee 100644
--- a/src/mainboard/hp/abm/romstage.c
+++ b/src/mainboard/hp/abm/romstage.c
@@ -32,8 +32,6 @@ void board_BeforeAgesa(struct sysinfo *cb)
 	pci_devfn_t dev = PCI_DEV(0, 0x14, 3);
 	pci_write_config32(dev, 0x44, 0xff03ffd5);
 
-	hudson_lpc_port80();
-
 	/* In Hudson RRG, PMIOxD2[5:4] is "Drive strength control for
 	 *  LpcClk[1:0]".  To be consistent with Parmer, setting to 4mA
 	 *  even though the register is not documented in the Kabini BKDG.
diff --git a/src/mainboard/hp/pavilion_m6_1035dx/Kconfig b/src/mainboard/hp/pavilion_m6_1035dx/Kconfig
index 05ea52ff20..144b1138f6 100644
--- a/src/mainboard/hp/pavilion_m6_1035dx/Kconfig
+++ b/src/mainboard/hp/pavilion_m6_1035dx/Kconfig
@@ -22,6 +22,7 @@ config BOARD_SPECIFIC_OPTIONS
 	select CPU_AMD_AGESA_FAMILY15_TN
 	select NORTHBRIDGE_AMD_AGESA_FAMILY15_TN
 	select SOUTHBRIDGE_AMD_AGESA_HUDSON
+	select DEFAULT_POST_ON_LPC
 	select EC_COMPAL_ENE932
 	select HAVE_OPTION_TABLE
 	select HAVE_PIRQ_TABLE
diff --git a/src/mainboard/hp/pavilion_m6_1035dx/romstage.c b/src/mainboard/hp/pavilion_m6_1035dx/romstage.c
index c05b87a0ec..0395566b74 100644
--- a/src/mainboard/hp/pavilion_m6_1035dx/romstage.c
+++ b/src/mainboard/hp/pavilion_m6_1035dx/romstage.c
@@ -18,5 +18,4 @@
 
 void board_BeforeAgesa(struct sysinfo *cb)
 {
-	hudson_lpc_port80();
 }