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-rw-r--r--src/mainboard/google/chell/devicetree.cb3
-rw-r--r--src/mainboard/google/glados/devicetree.cb3
-rw-r--r--src/mainboard/google/lars/devicetree.cb3
3 files changed, 9 insertions, 0 deletions
diff --git a/src/mainboard/google/chell/devicetree.cb b/src/mainboard/google/chell/devicetree.cb
index e401f26e0c..ffc805c652 100644
--- a/src/mainboard/google/chell/devicetree.cb
+++ b/src/mainboard/google/chell/devicetree.cb
@@ -167,6 +167,9 @@ chip soc/intel/skylake
# I2C4 is 1.8V
register "SerialIoI2cVoltage[4]" = "1"
+ # PL2 override 15W
+ register "tdp_pl2_override" = "15"
+
device cpu_cluster 0 on
device lapic 0 on end
end
diff --git a/src/mainboard/google/glados/devicetree.cb b/src/mainboard/google/glados/devicetree.cb
index 03c46f4005..c3aae8cf97 100644
--- a/src/mainboard/google/glados/devicetree.cb
+++ b/src/mainboard/google/glados/devicetree.cb
@@ -167,6 +167,9 @@ chip soc/intel/skylake
# I2C4 is 1.8V
register "SerialIoI2cVoltage[4]" = "1"
+ # PL2 override 15W
+ register "tdp_pl2_override" = "15"
+
device cpu_cluster 0 on
device lapic 0 on end
end
diff --git a/src/mainboard/google/lars/devicetree.cb b/src/mainboard/google/lars/devicetree.cb
index e858eeac74..c601507b1f 100644
--- a/src/mainboard/google/lars/devicetree.cb
+++ b/src/mainboard/google/lars/devicetree.cb
@@ -161,6 +161,9 @@ chip soc/intel/skylake
[PchSerialIoIndexUart2] = PchSerialIoSkipInit, \
}"
+ # PL2 override 25W
+ register "tdp_pl2_override" = "25"
+
device cpu_cluster 0 on
device lapic 0 on end
end