diff options
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/hatch/variants/baseboard/devicetree.cb | 5 | ||||
| -rw-r--r-- | src/mainboard/google/hatch/variants/baseboard/gpio.c | 20 |
2 files changed, 24 insertions, 1 deletions
diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb index 5b777f840d..97579d48f7 100644 --- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb @@ -80,6 +80,9 @@ chip soc/intel/cannonlake # ClkReq-to-ClkSrc mapping for CLK SRC 1 register "PcieClkSrcClkReq[1]" = "1" + # GPIO for SD card detect + register "sdcard_cd_gpio" = "GPP_G5" + device cpu_cluster 0 on device lapic 0 on end end @@ -173,7 +176,7 @@ chip soc/intel/cannonlake register "wake" = "GPE0_PME_B0" device pci 14.3 on end # CNVi wifi end - device pci 14.5 off end # SDCard + device pci 14.5 on end # SDCard device pci 15.0 on chip drivers/i2c/generic register "hid" = ""ELAN0000"" diff --git a/src/mainboard/google/hatch/variants/baseboard/gpio.c b/src/mainboard/google/hatch/variants/baseboard/gpio.c index e855fed9ff..b40ebd4c8a 100644 --- a/src/mainboard/google/hatch/variants/baseboard/gpio.c +++ b/src/mainboard/google/hatch/variants/baseboard/gpio.c @@ -19,6 +19,10 @@ #include <commonlib/helpers.h> static const struct pad_config gpio_table[] = { + /* SD_1P8_SEL => NC */ + PAD_NC(GPP_A16, DN_20K), + /* EN_PP3300_SD_DX */ + PAD_CFG_NF(GPP_A17, NONE, DEEP, NF1), /* TRACKPAD_INT_ODL */ PAD_CFG_GPI_APIC(GPP_A21, NONE, PLTRST, LEVEL, INVERT), /* SRCCLKREQ1 */ @@ -95,6 +99,22 @@ static const struct pad_config gpio_table[] = { PAD_CFG_GPI(GPP_F11, NONE, PLTRST), /* PCH_MEM_STRAP3 */ PAD_CFG_GPI(GPP_F22, NONE, PLTRST), + /* SD_CMD */ + PAD_CFG_NF(GPP_G0, NONE, DEEP, NF1), + /* SD_DATA0 */ + PAD_CFG_NF(GPP_G1, NONE, DEEP, NF1), + /* SD_DATA1 */ + PAD_CFG_NF(GPP_G2, NONE, DEEP, NF1), + /* SD_DATA2 */ + PAD_CFG_NF(GPP_G3, NONE, DEEP, NF1), + /* SD_DATA3 */ + PAD_CFG_NF(GPP_G4, NONE, DEEP, NF1), + /* SD_CD# */ + PAD_CFG_NF(GPP_G5, NONE, DEEP, NF1), + /* SD_CLK */ + PAD_CFG_NF(GPP_G6, NONE, DEEP, NF1), + /* SD_WP => NC */ + PAD_NC(GPP_G7, DN_20K), }; const struct pad_config *__weak variant_gpio_table(size_t *num) |