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-rw-r--r--src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb2
-rw-r--r--src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb2
2 files changed, 0 insertions, 4 deletions
diff --git a/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb
index 162796159e..eb85cb5323 100644
--- a/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb
+++ b/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb
@@ -1,7 +1,5 @@
chip soc/intel/alderlake
- device cpu_cluster 0 on end
-
# GPE configuration
register "pmc_gpe0_dw0" = "GPP_A"
register "pmc_gpe0_dw1" = "GPP_E"
diff --git a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
index 3591a7b29b..8a779bca05 100644
--- a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
+++ b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
@@ -1,7 +1,5 @@
chip soc/intel/alderlake
- device cpu_cluster 0 on end
-
register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}"
# GPE configuration