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-rw-r--r--src/mainboard/google/auron/devicetree.cb2
-rw-r--r--src/mainboard/google/auron/variants/buddy/overridetree.cb2
-rw-r--r--src/mainboard/google/auron/variants/samus/overridetree.cb2
-rw-r--r--src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb2
-rw-r--r--src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb2
-rw-r--r--src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb2
-rw-r--r--src/mainboard/google/brya/variants/baseboard/hades/devicetree.cb2
-rw-r--r--src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb2
-rw-r--r--src/mainboard/google/brya/variants/orisa/overridetree.cb2
-rw-r--r--src/mainboard/google/brya/variants/trulo/overridetree.cb2
-rw-r--r--src/mainboard/google/dedede/variants/baseboard/devicetree.cb2
-rw-r--r--src/mainboard/google/drallion/variants/drallion/devicetree.cb2
-rw-r--r--src/mainboard/google/guybrush/variants/baseboard/devicetree.cb2
-rw-r--r--src/mainboard/google/hatch/variants/baseboard/devicetree.cb2
-rw-r--r--src/mainboard/google/puff/variants/baseboard/devicetree.cb2
-rw-r--r--src/mainboard/google/rex/variants/baseboard/ovis/devicetree.cb2
-rw-r--r--src/mainboard/google/rex/variants/baseboard/ovis/devicetree_pre_prod.cb2
-rw-r--r--src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb2
-rw-r--r--src/mainboard/google/rex/variants/baseboard/rex/devicetree_pre_prod.cb2
-rw-r--r--src/mainboard/google/sarien/variants/arcada/devicetree.cb2
-rw-r--r--src/mainboard/google/sarien/variants/sarien/devicetree.cb2
-rw-r--r--src/mainboard/google/volteer/variants/baseboard/devicetree.cb2
22 files changed, 22 insertions, 22 deletions
diff --git a/src/mainboard/google/auron/devicetree.cb b/src/mainboard/google/auron/devicetree.cb
index 2ded45256d..49db518760 100644
--- a/src/mainboard/google/auron/devicetree.cb
+++ b/src/mainboard/google/auron/devicetree.cb
@@ -17,7 +17,7 @@ chip soc/intel/broadwell
chip cpu/intel/haswell
device cpu_cluster 0 on ops broadwell_cpu_bus_ops end
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
end
device domain 0 on
diff --git a/src/mainboard/google/auron/variants/buddy/overridetree.cb b/src/mainboard/google/auron/variants/buddy/overridetree.cb
index be96e95d1f..d1e217b8aa 100644
--- a/src/mainboard/google/auron/variants/buddy/overridetree.cb
+++ b/src/mainboard/google/auron/variants/buddy/overridetree.cb
@@ -14,7 +14,7 @@ chip soc/intel/broadwell
chip cpu/intel/haswell
device cpu_cluster 0 on end
- register "s0ix_enable" = "0"
+ register "s0ix_enable" = "false"
end
device domain 0 on
diff --git a/src/mainboard/google/auron/variants/samus/overridetree.cb b/src/mainboard/google/auron/variants/samus/overridetree.cb
index 3de469ecac..b0b8a603f6 100644
--- a/src/mainboard/google/auron/variants/samus/overridetree.cb
+++ b/src/mainboard/google/auron/variants/samus/overridetree.cb
@@ -16,7 +16,7 @@ chip soc/intel/broadwell
device cpu_cluster 0 on end
# Disable S0ix for now
- register "s0ix_enable" = "0"
+ register "s0ix_enable" = "false"
register "vr_config" = "{
.slow_ramp_rate_set = 3,
diff --git a/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb b/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb
index 22e15aca89..b900af19aa 100644
--- a/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb
+++ b/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb
@@ -15,7 +15,7 @@ chip soc/intel/alderlake
register "sagv" = "SaGv_Enabled"
# S0ix enable
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# Disable package C state demotion on Raptorlake as a W/A for S0ix issues
# seen on J0 and Q0 SKUs
diff --git a/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb
index 38535a4773..2ba54bcf11 100644
--- a/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb
+++ b/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb
@@ -15,7 +15,7 @@ chip soc/intel/alderlake
register "gen3_dec" = "0x00fc0901"
# S0ix enable
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# DPTF enable
register "dptf_enable" = "1"
diff --git a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
index 0290181714..e07cf2adec 100644
--- a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
+++ b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
@@ -12,7 +12,7 @@ chip soc/intel/alderlake
register "gen3_dec" = "0x00fc0901"
# S0ix enable
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# Disable package C state demotion on Raptorlake as a W/A for S0ix issues
# seen on J0 and Q0 SKUs
diff --git a/src/mainboard/google/brya/variants/baseboard/hades/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/hades/devicetree.cb
index 4372888ebc..f91b0885ae 100644
--- a/src/mainboard/google/brya/variants/baseboard/hades/devicetree.cb
+++ b/src/mainboard/google/brya/variants/baseboard/hades/devicetree.cb
@@ -12,7 +12,7 @@ chip soc/intel/alderlake
register "gen3_dec" = "0x00fc0901"
# S0ix enable
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# DPTF enable
register "dptf_enable" = "1"
diff --git a/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb
index aac4bca376..3d28ed3e3d 100644
--- a/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb
+++ b/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb
@@ -29,7 +29,7 @@ chip soc/intel/alderlake
register "gen3_dec" = "0x00fc0901"
# S0ix enable
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# DPTF enable
register "dptf_enable" = "1"
diff --git a/src/mainboard/google/brya/variants/orisa/overridetree.cb b/src/mainboard/google/brya/variants/orisa/overridetree.cb
index ffc3a56660..ad5b94328d 100644
--- a/src/mainboard/google/brya/variants/orisa/overridetree.cb
+++ b/src/mainboard/google/brya/variants/orisa/overridetree.cb
@@ -24,7 +24,7 @@ chip soc/intel/alderlake
register "pmc_gpe0_dw2" = "GPP_F"
# S0ix enable
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# DPTF enable
register "dptf_enable" = "1"
diff --git a/src/mainboard/google/brya/variants/trulo/overridetree.cb b/src/mainboard/google/brya/variants/trulo/overridetree.cb
index a5b346c42f..868342b5ce 100644
--- a/src/mainboard/google/brya/variants/trulo/overridetree.cb
+++ b/src/mainboard/google/brya/variants/trulo/overridetree.cb
@@ -24,7 +24,7 @@ chip soc/intel/alderlake
register "pmc_gpe0_dw2" = "GPP_F"
# S0ix enable
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# DPTF enable
register "dptf_enable" = "1"
diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
index 534db383be..cc2b66d6d9 100644
--- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
@@ -145,7 +145,7 @@ chip soc/intel/jasperlake
register "SdCardPowerEnableActiveHigh" = "1"
# Enable S0ix support
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# Display related UPDs
# Select eDP for port A
diff --git a/src/mainboard/google/drallion/variants/drallion/devicetree.cb b/src/mainboard/google/drallion/variants/drallion/devicetree.cb
index 302a09efe0..7238a064b4 100644
--- a/src/mainboard/google/drallion/variants/drallion/devicetree.cb
+++ b/src/mainboard/google/drallion/variants/drallion/devicetree.cb
@@ -39,7 +39,7 @@ chip soc/intel/cannonlake
# USB2 PHY Power gating
register "PchUsb2PhySusPgDisable" = "1"
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
register "dptf_enable" = "1"
register "power_limits_config" = "{
.tdp_pl1_override = 25,
diff --git a/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb b/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb
index 49ff8dd3c7..2fe3e46d97 100644
--- a/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb
@@ -53,7 +53,7 @@ chip soc/amd/cezanne
}"
# Enable S0i3 support
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# Enable STT support
register "stt_control" = "1"
diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
index 39cea80aae..8c33f0239b 100644
--- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
@@ -28,7 +28,7 @@ chip soc/intel/cannonlake
# Enable System Agent dynamic frequency
register "SaGv" = "SaGv_Enabled"
# Enable S0ix
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# Enable DPTF
register "dptf_enable" = "1"
register "power_limits_config" = "{
diff --git a/src/mainboard/google/puff/variants/baseboard/devicetree.cb b/src/mainboard/google/puff/variants/baseboard/devicetree.cb
index 9e8e96a01a..08880cb308 100644
--- a/src/mainboard/google/puff/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/puff/variants/baseboard/devicetree.cb
@@ -28,7 +28,7 @@ chip soc/intel/cannonlake
# Enable System Agent dynamic frequency
register "SaGv" = "SaGv_Enabled"
# Enable S0ix
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# Enable DPTF
register "dptf_enable" = "1"
register "power_limits_config" = "{
diff --git a/src/mainboard/google/rex/variants/baseboard/ovis/devicetree.cb b/src/mainboard/google/rex/variants/baseboard/ovis/devicetree.cb
index 7cb10d278c..f0eb655eb2 100644
--- a/src/mainboard/google/rex/variants/baseboard/ovis/devicetree.cb
+++ b/src/mainboard/google/rex/variants/baseboard/ovis/devicetree.cb
@@ -31,7 +31,7 @@ chip soc/intel/meteorlake
register "tcss_ports[3]" = "TCSS_PORT_EMPTY" # Disable USB-C Port 3
# S0ix enable
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# Disable C1 C-state auto-demotion
register "disable_c1_state_auto_demotion" = "1"
diff --git a/src/mainboard/google/rex/variants/baseboard/ovis/devicetree_pre_prod.cb b/src/mainboard/google/rex/variants/baseboard/ovis/devicetree_pre_prod.cb
index 7358eeb80c..16506ac4b9 100644
--- a/src/mainboard/google/rex/variants/baseboard/ovis/devicetree_pre_prod.cb
+++ b/src/mainboard/google/rex/variants/baseboard/ovis/devicetree_pre_prod.cb
@@ -31,7 +31,7 @@ chip soc/intel/meteorlake
register "tcss_ports[3]" = "TCSS_PORT_EMPTY" # Disable USB-C Port 3
# S0ix enable
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# Disable C1 C-state auto-demotion
register "disable_c1_state_auto_demotion" = "1"
diff --git a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb
index 00acbecc3e..13558a4ba4 100644
--- a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb
+++ b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb
@@ -31,7 +31,7 @@ chip soc/intel/meteorlake
register "tcss_ports[3]" = "TCSS_PORT_EMPTY" # Disable USB-C Port 3
# S0ix enable
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# Disable C1 C-state auto-demotion
register "disable_c1_state_auto_demotion" = "1"
diff --git a/src/mainboard/google/rex/variants/baseboard/rex/devicetree_pre_prod.cb b/src/mainboard/google/rex/variants/baseboard/rex/devicetree_pre_prod.cb
index 625a36b315..d7a5f8058f 100644
--- a/src/mainboard/google/rex/variants/baseboard/rex/devicetree_pre_prod.cb
+++ b/src/mainboard/google/rex/variants/baseboard/rex/devicetree_pre_prod.cb
@@ -31,7 +31,7 @@ chip soc/intel/meteorlake
register "tcss_ports[3]" = "TCSS_PORT_EMPTY" # Disable USB-C Port 3
# S0ix enable
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# Disable C1 C-state auto-demotion
register "disable_c1_state_auto_demotion" = "1"
diff --git a/src/mainboard/google/sarien/variants/arcada/devicetree.cb b/src/mainboard/google/sarien/variants/arcada/devicetree.cb
index fcaa730240..7eec7a8724 100644
--- a/src/mainboard/google/sarien/variants/arcada/devicetree.cb
+++ b/src/mainboard/google/sarien/variants/arcada/devicetree.cb
@@ -27,7 +27,7 @@ chip soc/intel/cannonlake
# USB2 PHY Power gating
register "PchUsb2PhySusPgDisable" = "1"
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
register "dptf_enable" = "1"
register "satapwroptimize" = "1"
register "power_limits_config" = "{
diff --git a/src/mainboard/google/sarien/variants/sarien/devicetree.cb b/src/mainboard/google/sarien/variants/sarien/devicetree.cb
index 589ea1c3aa..d10fd1f2e6 100644
--- a/src/mainboard/google/sarien/variants/sarien/devicetree.cb
+++ b/src/mainboard/google/sarien/variants/sarien/devicetree.cb
@@ -30,7 +30,7 @@ chip soc/intel/cannonlake
# USB2 PHY Power gating
register "PchUsb2PhySusPgDisable" = "1"
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
register "dptf_enable" = "1"
register "satapwroptimize" = "1"
register "AcousticNoiseMitigation" = "1"
diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
index 5dfc69c271..4ff518e6fa 100644
--- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
@@ -195,7 +195,7 @@ chip soc/intel/tigerlake
register "DdiPort4Ddc" = "0"
# Enable S0ix
- register "s0ix_enable" = "1"
+ register "s0ix_enable" = "true"
# Enable DPTF
register "dptf_enable" = "1"