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-rw-r--r--src/mainboard/google/deltaur/variants/baseboard/devicetree.cb2
-rw-r--r--src/mainboard/google/volteer/variants/baseboard/devicetree.cb1
2 files changed, 1 insertions, 2 deletions
diff --git a/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb b/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb
index 72ed789aec..9ed8fb299e 100644
--- a/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb
@@ -291,7 +291,7 @@ chip soc/intel/tigerlake
device pci 1f.1 off end # P2SB
device pci 1f.2 hidden end # PMC
device pci 1f.3 on end # Intel HDA
- device pci 1f.4 on end # SMBus
+ device pci 1f.4 off end # SMBus
device pci 1f.5 on end # PCH SPI Flash Controller
device pci 1f.6 off end # GbE Controller
device pci 1f.7 off end # Intel Trace Hub
diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
index b4c4f6a41f..eee29ef2ce 100644
--- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
@@ -92,7 +92,6 @@ chip soc/intel/tigerlake
# FSP configuration
register "SaGv" = "SaGv_Enabled"
- register "SmbusEnable" = "0"
register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port A0
register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port A1