diff options
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/auron/devicetree.cb | 9 | ||||
| -rw-r--r-- | src/mainboard/google/jecht/devicetree.cb | 9 |
2 files changed, 0 insertions, 18 deletions
diff --git a/src/mainboard/google/auron/devicetree.cb b/src/mainboard/google/auron/devicetree.cb index 65d4ce9c47..a3097624fe 100644 --- a/src/mainboard/google/auron/devicetree.cb +++ b/src/mainboard/google/auron/devicetree.cb @@ -15,15 +15,6 @@ chip soc/intel/broadwell # Set backlight PWM value for eDP register "gpu_pch_backlight_pwm_hz" = "200" - register "pirqa_routing" = "0x80" - register "pirqb_routing" = "0x80" - register "pirqc_routing" = "0x80" - register "pirqd_routing" = "0x80" - register "pirqe_routing" = "0x80" - register "pirqf_routing" = "0x80" - register "pirqg_routing" = "0x80" - register "pirqh_routing" = "0x80" - # EC range is 0x800-0x9ff register "gen1_dec" = "0x00fc0801" register "gen2_dec" = "0x00fc0901" diff --git a/src/mainboard/google/jecht/devicetree.cb b/src/mainboard/google/jecht/devicetree.cb index 4856cca65a..c4707e0c00 100644 --- a/src/mainboard/google/jecht/devicetree.cb +++ b/src/mainboard/google/jecht/devicetree.cb @@ -9,15 +9,6 @@ chip soc/intel/broadwell # Enable HDMI Hotplug with 6ms pulse register "gpu_dp_b_hotplug" = "0x06" - register "pirqa_routing" = "0x80" - register "pirqb_routing" = "0x80" - register "pirqc_routing" = "0x80" - register "pirqd_routing" = "0x80" - register "pirqe_routing" = "0x80" - register "pirqf_routing" = "0x80" - register "pirqg_routing" = "0x80" - register "pirqh_routing" = "0x80" - # SuperIO range is 0x700-0x73f register "gen2_dec" = "0x003c0701" |