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-rw-r--r--src/mainboard/google/veyron_mighty/sdram_inf/sdram-ddr3-hynix-2GB.inc78
-rw-r--r--src/mainboard/google/veyron_mighty/sdram_inf/sdram-ddr3-hynix-4GB.inc78
-rw-r--r--src/mainboard/google/veyron_mighty/sdram_inf/sdram-ddr3-nanya-2GB.inc78
-rw-r--r--src/mainboard/google/veyron_mighty/sdram_inf/sdram-ddr3-samsung-2GB.inc78
-rw-r--r--src/mainboard/google/veyron_mighty/sdram_inf/sdram-ddr3-samsung-4GB.inc78
-rw-r--r--src/mainboard/google/veyron_mighty/sdram_inf/sdram-lpddr3-elpida-2GB.inc78
-rw-r--r--src/mainboard/google/veyron_mighty/sdram_inf/sdram-lpddr3-elpida-4GB.inc78
-rw-r--r--src/mainboard/google/veyron_mighty/sdram_inf/sdram-lpddr3-hynix-2GB.inc78
-rw-r--r--src/mainboard/google/veyron_mighty/sdram_inf/sdram-lpddr3-hynix-4GB.inc77
-rw-r--r--src/mainboard/google/veyron_mighty/sdram_inf/sdram-lpddr3-samsung-2GB.inc78
-rw-r--r--src/mainboard/google/veyron_mighty/sdram_inf/sdram-lpddr3-samsung-4GB.inc77
-rw-r--r--src/mainboard/google/veyron_mighty/sdram_inf/sdram-unused.inc3
12 files changed, 0 insertions, 859 deletions
diff --git a/src/mainboard/google/veyron_mighty/sdram_inf/sdram-ddr3-hynix-2GB.inc b/src/mainboard/google/veyron_mighty/sdram_inf/sdram-ddr3-hynix-2GB.inc
deleted file mode 100644
index 659cfd4b88..0000000000
--- a/src/mainboard/google/veyron_mighty/sdram_inf/sdram-ddr3-hynix-2GB.inc
+++ /dev/null
@@ -1,78 +0,0 @@
-{
- /* 4 Hynic H5TC4G63CFR(0101b) or H5TC4G63AFR(1101b) chips */
- {
- {
- .rank = 0x1,
- .col = 0xA,
- .bk = 0x3,
- .bw = 0x2,
- .dbw = 0x1,
- .row_3_4 = 0x0,
- .cs0_row = 0xF,
- .cs1_row = 0xF
- },
- {
- .rank = 0x1,
- .col = 0xA,
- .bk = 0x3,
- .bw = 0x2,
- .dbw = 0x1,
- .row_3_4 = 0x0,
- .cs0_row = 0xF,
- .cs1_row = 0xF
- }
- },
- {
- .togcnt1u = 0x29A,
- .tinit = 0xC8,
- .trsth = 0x1F4,
- .togcnt100n = 0x42,
- .trefi = 0x4E,
- .tmrd = 0x4,
- .trfc = 0xEA,
- .trp = 0xA,
- .trtw = 0x5,
- .tal = 0x0,
- .tcl = 0xA,
- .tcwl = 0x7,
- .tras = 0x19,
- .trc = 0x24,
- .trcd = 0xA,
- .trrd = 0x7,
- .trtp = 0x5,
- .twr = 0xA,
- .twtr = 0x5,
- .texsr = 0x200,
- .txp = 0x5,
- .txpdll = 0x10,
- .tzqcs = 0x40,
- .tzqcsi = 0x0,
- .tdqs = 0x1,
- .tcksre = 0x7,
- .tcksrx = 0x7,
- .tcke = 0x4,
- .tmod = 0xC,
- .trstl = 0x43,
- .tzqcl = 0x100,
- .tmrr = 0x0,
- .tckesr = 0x5,
- .tdpd = 0x0
- },
- {
- .dtpr0 = 0x48F9AAB4,
- .dtpr1 = 0xEA0910,
- .dtpr2 = 0x1002C200,
- .mr[0] = 0xA60,
- .mr[1] = 0x40,
- .mr[2] = 0x10,
- .mr[3] = 0x0
- },
- .noc_timing = 0x30B25564,
- .noc_activate = 0x627,
- .ddrconfig = 3,
- .ddr_freq = 666*MHz,
- .dramtype = DDR3,
- .num_channels = 2,
- .stride = 9,
- .odt = 1
-},
diff --git a/src/mainboard/google/veyron_mighty/sdram_inf/sdram-ddr3-hynix-4GB.inc b/src/mainboard/google/veyron_mighty/sdram_inf/sdram-ddr3-hynix-4GB.inc
deleted file mode 100644
index 9f2ca8a7d2..0000000000
--- a/src/mainboard/google/veyron_mighty/sdram_inf/sdram-ddr3-hynix-4GB.inc
+++ /dev/null
@@ -1,78 +0,0 @@
-{
- /* 4 Hynix H5TC8G63xxx chips */
- {
- {
- .rank = 0x2,
- .col = 0xA,
- .bk = 0x3,
- .bw = 0x2,
- .dbw = 0x1,
- .row_3_4 = 0x0,
- .cs0_row = 0xF,
- .cs1_row = 0xF
- },
- {
- .rank = 0x2,
- .col = 0xA,
- .bk = 0x3,
- .bw = 0x2,
- .dbw = 0x1,
- .row_3_4 = 0x0,
- .cs0_row = 0xF,
- .cs1_row = 0xF
- }
- },
- {
- .togcnt1u = 0x29A,
- .tinit = 0xC8,
- .trsth = 0x1F4,
- .togcnt100n = 0x42,
- .trefi = 0x4E,
- .tmrd = 0x4,
- .trfc = 0xEA,
- .trp = 0xA,
- .trtw = 0x5,
- .tal = 0x0,
- .tcl = 0xA,
- .tcwl = 0x7,
- .tras = 0x19,
- .trc = 0x24,
- .trcd = 0xA,
- .trrd = 0x7,
- .trtp = 0x5,
- .twr = 0xA,
- .twtr = 0x5,
- .texsr = 0x200,
- .txp = 0x5,
- .txpdll = 0x10,
- .tzqcs = 0x40,
- .tzqcsi = 0x0,
- .tdqs = 0x1,
- .tcksre = 0x7,
- .tcksrx = 0x7,
- .tcke = 0x4,
- .tmod = 0xC,
- .trstl = 0x43,
- .tzqcl = 0x100,
- .tmrr = 0x0,
- .tckesr = 0x5,
- .tdpd = 0x0
- },
- {
- .dtpr0 = 0x48F9AAB4,
- .dtpr1 = 0xEA0910,
- .dtpr2 = 0x1002C200,
- .mr[0] = 0xA60,
- .mr[1] = 0x40,
- .mr[2] = 0x10,
- .mr[3] = 0x0
- },
- .noc_timing = 0x30B25564,
- .noc_activate = 0x627,
- .ddrconfig = 3,
- .ddr_freq = 666*MHz,
- .dramtype = DDR3,
- .num_channels = 2,
- .stride = 13,
- .odt = 1
-},
diff --git a/src/mainboard/google/veyron_mighty/sdram_inf/sdram-ddr3-nanya-2GB.inc b/src/mainboard/google/veyron_mighty/sdram_inf/sdram-ddr3-nanya-2GB.inc
deleted file mode 100644
index bd82e7b774..0000000000
--- a/src/mainboard/google/veyron_mighty/sdram_inf/sdram-ddr3-nanya-2GB.inc
+++ /dev/null
@@ -1,78 +0,0 @@
-{
- /* 4 Nanya NT5CC256M16DP chips */
- {
- {
- .rank = 0x1,
- .col = 0xA,
- .bk = 0x3,
- .bw = 0x2,
- .dbw = 0x1,
- .row_3_4 = 0x0,
- .cs0_row = 0xF,
- .cs1_row = 0xF
- },
- {
- .rank = 0x1,
- .col = 0xA,
- .bk = 0x3,
- .bw = 0x2,
- .dbw = 0x1,
- .row_3_4 = 0x0,
- .cs0_row = 0xF,
- .cs1_row = 0xF
- }
- },
- {
- .togcnt1u = 0x29A,
- .tinit = 0xC8,
- .trsth = 0x1F4,
- .togcnt100n = 0x42,
- .trefi = 0x4E,
- .tmrd = 0x4,
- .trfc = 0xEA,
- .trp = 0xA,
- .trtw = 0x5,
- .tal = 0x0,
- .tcl = 0xA,
- .tcwl = 0x7,
- .tras = 0x19,
- .trc = 0x24,
- .trcd = 0xA,
- .trrd = 0x7,
- .trtp = 0x5,
- .twr = 0xA,
- .twtr = 0x5,
- .texsr = 0x200,
- .txp = 0x5,
- .txpdll = 0x10,
- .tzqcs = 0x40,
- .tzqcsi = 0x0,
- .tdqs = 0x1,
- .tcksre = 0x7,
- .tcksrx = 0x7,
- .tcke = 0x4,
- .tmod = 0xC,
- .trstl = 0x43,
- .tzqcl = 0x100,
- .tmrr = 0x0,
- .tckesr = 0x5,
- .tdpd = 0x0
- },
- {
- .dtpr0 = 0x48F9AAB4,
- .dtpr1 = 0xEA0910,
- .dtpr2 = 0x1002C200,
- .mr[0] = 0xA60,
- .mr[1] = 0x40,
- .mr[2] = 0x10,
- .mr[3] = 0x0
- },
- .noc_timing = 0x30B25564,
- .noc_activate = 0x627,
- .ddrconfig = 3,
- .ddr_freq = 666*MHz,
- .dramtype = DDR3,
- .num_channels = 2,
- .stride = 9,
- .odt = 1
-},
diff --git a/src/mainboard/google/veyron_mighty/sdram_inf/sdram-ddr3-samsung-2GB.inc b/src/mainboard/google/veyron_mighty/sdram_inf/sdram-ddr3-samsung-2GB.inc
deleted file mode 100644
index f5793d1561..0000000000
--- a/src/mainboard/google/veyron_mighty/sdram_inf/sdram-ddr3-samsung-2GB.inc
+++ /dev/null
@@ -1,78 +0,0 @@
-{
- /* two Samsung K4B4G1646D-BYK0 chips */
- {
- {
- .rank = 0x1,
- .col = 0xA,
- .bk = 0x3,
- .bw = 0x2,
- .dbw = 0x1,
- .row_3_4 = 0x0,
- .cs0_row = 0xF,
- .cs1_row = 0xF
- },
- {
- .rank = 0x1,
- .col = 0xA,
- .bk = 0x3,
- .bw = 0x2,
- .dbw = 0x1,
- .row_3_4 = 0x0,
- .cs0_row = 0xF,
- .cs1_row = 0xF
- }
- },
- {
- .togcnt1u = 0x29A,
- .tinit = 0xC8,
- .trsth = 0x1F4,
- .togcnt100n = 0x42,
- .trefi = 0x4E,
- .tmrd = 0x4,
- .trfc = 0xEA,
- .trp = 0xA,
- .trtw = 0x5,
- .tal = 0x0,
- .tcl = 0xA,
- .tcwl = 0x7,
- .tras = 0x19,
- .trc = 0x24,
- .trcd = 0xA,
- .trrd = 0x7,
- .trtp = 0x5,
- .twr = 0xA,
- .twtr = 0x5,
- .texsr = 0x200,
- .txp = 0x5,
- .txpdll = 0x10,
- .tzqcs = 0x40,
- .tzqcsi = 0x0,
- .tdqs = 0x1,
- .tcksre = 0x7,
- .tcksrx = 0x7,
- .tcke = 0x4,
- .tmod = 0xC,
- .trstl = 0x43,
- .tzqcl = 0x100,
- .tmrr = 0x0,
- .tckesr = 0x5,
- .tdpd = 0x0
- },
- {
- .dtpr0 = 0x48F9AAB4,
- .dtpr1 = 0xEA0910,
- .dtpr2 = 0x1002C200,
- .mr[0] = 0xA60,
- .mr[1] = 0x40,
- .mr[2] = 0x10,
- .mr[3] = 0x0
- },
- .noc_timing = 0x30B25564,
- .noc_activate = 0x627,
- .ddrconfig = 3,
- .ddr_freq = 666*MHz,
- .dramtype = DDR3,
- .num_channels = 2,
- .stride = 9,
- .odt = 1
-},
diff --git a/src/mainboard/google/veyron_mighty/sdram_inf/sdram-ddr3-samsung-4GB.inc b/src/mainboard/google/veyron_mighty/sdram_inf/sdram-ddr3-samsung-4GB.inc
deleted file mode 100644
index a32f1a6129..0000000000
--- a/src/mainboard/google/veyron_mighty/sdram_inf/sdram-ddr3-samsung-4GB.inc
+++ /dev/null
@@ -1,78 +0,0 @@
-{
- /* 4 Samsung K4B8G1646Q chips */
- {
- {
- .rank = 0x2,
- .col = 0xA,
- .bk = 0x3,
- .bw = 0x2,
- .dbw = 0x1,
- .row_3_4 = 0x0,
- .cs0_row = 0xF,
- .cs1_row = 0xF
- },
- {
- .rank = 0x2,
- .col = 0xA,
- .bk = 0x3,
- .bw = 0x2,
- .dbw = 0x1,
- .row_3_4 = 0x0,
- .cs0_row = 0xF,
- .cs1_row = 0xF
- }
- },
- {
- .togcnt1u = 0x29A,
- .tinit = 0xC8,
- .trsth = 0x1F4,
- .togcnt100n = 0x42,
- .trefi = 0x4E,
- .tmrd = 0x4,
- .trfc = 0xEA,
- .trp = 0xA,
- .trtw = 0x5,
- .tal = 0x0,
- .tcl = 0xA,
- .tcwl = 0x7,
- .tras = 0x19,
- .trc = 0x24,
- .trcd = 0xA,
- .trrd = 0x7,
- .trtp = 0x5,
- .twr = 0xA,
- .twtr = 0x5,
- .texsr = 0x200,
- .txp = 0x5,
- .txpdll = 0x10,
- .tzqcs = 0x40,
- .tzqcsi = 0x0,
- .tdqs = 0x1,
- .tcksre = 0x7,
- .tcksrx = 0x7,
- .tcke = 0x4,
- .tmod = 0xC,
- .trstl = 0x43,
- .tzqcl = 0x100,
- .tmrr = 0x0,
- .tckesr = 0x5,
- .tdpd = 0x0
- },
- {
- .dtpr0 = 0x48F9AAB4,
- .dtpr1 = 0xEA0910,
- .dtpr2 = 0x1002C200,
- .mr[0] = 0xA60,
- .mr[1] = 0x40,
- .mr[2] = 0x10,
- .mr[3] = 0x0
- },
- .noc_timing = 0x30B25564,
- .noc_activate = 0x627,
- .ddrconfig = 3,
- .ddr_freq = 666*MHz,
- .dramtype = DDR3,
- .num_channels = 2,
- .stride = 13,
- .odt = 1
-},
diff --git a/src/mainboard/google/veyron_mighty/sdram_inf/sdram-lpddr3-elpida-2GB.inc b/src/mainboard/google/veyron_mighty/sdram_inf/sdram-lpddr3-elpida-2GB.inc
deleted file mode 100644
index ef82b27781..0000000000
--- a/src/mainboard/google/veyron_mighty/sdram_inf/sdram-lpddr3-elpida-2GB.inc
+++ /dev/null
@@ -1,78 +0,0 @@
-{
- /* two ELPIDA F8132A3MA-GD-F chips */
- {
- {
- .rank = 0x2,
- .col = 0xA,
- .bk = 0x3,
- .bw = 0x2,
- .dbw = 0x2,
- .row_3_4 = 0x0,
- .cs0_row = 0xE,
- .cs1_row = 0xE
- },
- {
- .rank = 0x2,
- .col = 0xA,
- .bk = 0x3,
- .bw = 0x2,
- .dbw = 0x2,
- .row_3_4 = 0x0,
- .cs0_row = 0xE,
- .cs1_row = 0xE
- }
- },
- {
- .togcnt1u = 0x215,
- .tinit = 0xC8,
- .trsth = 0x0,
- .togcnt100n = 0x35,
- .trefi = 0x26,
- .tmrd = 0x2,
- .trfc = 0x70,
- .trp = 0x2000D,
- .trtw = 0x6,
- .tal = 0x0,
- .tcl = 0x8,
- .tcwl = 0x4,
- .tras = 0x17,
- .trc = 0x24,
- .trcd = 0xD,
- .trrd = 0x6,
- .trtp = 0x4,
- .twr = 0x8,
- .twtr = 0x4,
- .texsr = 0x76,
- .txp = 0x4,
- .txpdll = 0x0,
- .tzqcs = 0x30,
- .tzqcsi = 0x0,
- .tdqs = 0x1,
- .tcksre = 0x2,
- .tcksrx = 0x2,
- .tcke = 0x4,
- .tmod = 0x0,
- .trstl = 0x0,
- .tzqcl = 0xC0,
- .tmrr = 0x4,
- .tckesr = 0x8,
- .tdpd = 0x1F4
- },
- {
- .dtpr0 = 0x48D7DD93,
- .dtpr1 = 0x187008D8,
- .dtpr2 = 0x121076,
- .mr[0] = 0x0,
- .mr[1] = 0xC3,
- .mr[2] = 0x6,
- .mr[3] = 0x1
- },
- .noc_timing = 0x20D266A4,
- .noc_activate = 0x5B6,
- .ddrconfig = 2,
- .ddr_freq = 533*MHz,
- .dramtype = LPDDR3,
- .num_channels = 2,
- .stride = 9,
- .odt = 0
-},
diff --git a/src/mainboard/google/veyron_mighty/sdram_inf/sdram-lpddr3-elpida-4GB.inc b/src/mainboard/google/veyron_mighty/sdram_inf/sdram-lpddr3-elpida-4GB.inc
deleted file mode 100644
index e071646bf4..0000000000
--- a/src/mainboard/google/veyron_mighty/sdram_inf/sdram-lpddr3-elpida-4GB.inc
+++ /dev/null
@@ -1,78 +0,0 @@
-{
- /* two ELPIDA FA232A2MA-GC-F chips */
- {
- {
- .rank = 0x2,
- .col = 0xB,
- .bk = 0x3,
- .bw = 0x2,
- .dbw = 0x2,
- .row_3_4 = 0x0,
- .cs0_row = 0xE,
- .cs1_row = 0xE
- },
- {
- .rank = 0x2,
- .col = 0xB,
- .bk = 0x3,
- .bw = 0x2,
- .dbw = 0x2,
- .row_3_4 = 0x0,
- .cs0_row = 0xE,
- .cs1_row = 0xE
- }
- },
- {
- .togcnt1u = 0x215,
- .tinit = 0xC8,
- .trsth = 0x0,
- .togcnt100n = 0x35,
- .trefi = 0x26,
- .tmrd = 0x2,
- .trfc = 0x70,
- .trp = 0x2000D,
- .trtw = 0x6,
- .tal = 0x0,
- .tcl = 0x8,
- .tcwl = 0x4,
- .tras = 0x17,
- .trc = 0x24,
- .trcd = 0xD,
- .trrd = 0x6,
- .trtp = 0x4,
- .twr = 0x8,
- .twtr = 0x4,
- .texsr = 0x76,
- .txp = 0x4,
- .txpdll = 0x0,
- .tzqcs = 0x30,
- .tzqcsi = 0x0,
- .tdqs = 0x1,
- .tcksre = 0x2,
- .tcksrx = 0x2,
- .tcke = 0x4,
- .tmod = 0x0,
- .trstl = 0x0,
- .tzqcl = 0xC0,
- .tmrr = 0x4,
- .tckesr = 0x8,
- .tdpd = 0x1F4
- },
- {
- .dtpr0 = 0x48D7DD93,
- .dtpr1 = 0x187008D8,
- .dtpr2 = 0x121076,
- .mr[0] = 0x0,
- .mr[1] = 0xC3,
- .mr[2] = 0x6,
- .mr[3] = 0x1
- },
- .noc_timing = 0x20D266A4,
- .noc_activate = 0x5B6,
- .ddrconfig = 6,
- .ddr_freq = 533*MHz,
- .dramtype = LPDDR3,
- .num_channels = 2,
- .stride = 13,
- .odt = 0
-},
diff --git a/src/mainboard/google/veyron_mighty/sdram_inf/sdram-lpddr3-hynix-2GB.inc b/src/mainboard/google/veyron_mighty/sdram_inf/sdram-lpddr3-hynix-2GB.inc
deleted file mode 100644
index 00dc549161..0000000000
--- a/src/mainboard/google/veyron_mighty/sdram_inf/sdram-lpddr3-hynix-2GB.inc
+++ /dev/null
@@ -1,78 +0,0 @@
-{
- /* 2 Hynix H9CCNNN8GTMLAR chips */
- {
- {
- .rank = 0x1,
- .col = 0xA,
- .bk = 0x3,
- .bw = 0x2,
- .dbw = 0x2,
- .row_3_4 = 0x0,
- .cs0_row = 0xF,
- .cs1_row = 0xF
- },
- {
- .rank = 0x1,
- .col = 0xA,
- .bk = 0x3,
- .bw = 0x2,
- .dbw = 0x2,
- .row_3_4 = 0x0,
- .cs0_row = 0xF,
- .cs1_row = 0xF
- }
- },
- {
- .togcnt1u = 0x215,
- .tinit = 0xC8,
- .trsth = 0x0,
- .togcnt100n = 0x35,
- .trefi = 0x26,
- .tmrd = 0x2,
- .trfc = 0x70,
- .trp = 0x2000D,
- .trtw = 0x6,
- .tal = 0x0,
- .tcl = 0x8,
- .tcwl = 0x4,
- .tras = 0x17,
- .trc = 0x24,
- .trcd = 0xD,
- .trrd = 0x6,
- .trtp = 0x4,
- .twr = 0x8,
- .twtr = 0x4,
- .texsr = 0x76,
- .txp = 0x4,
- .txpdll = 0x0,
- .tzqcs = 0x30,
- .tzqcsi = 0x0,
- .tdqs = 0x1,
- .tcksre = 0x2,
- .tcksrx = 0x2,
- .tcke = 0x4,
- .tmod = 0x0,
- .trstl = 0x0,
- .tzqcl = 0xC0,
- .tmrr = 0x4,
- .tckesr = 0x8,
- .tdpd = 0x1F4
- },
- {
- .dtpr0 = 0x48D7DD93,
- .dtpr1 = 0x187008D8,
- .dtpr2 = 0x121076,
- .mr[0] = 0x0,
- .mr[1] = 0xC3,
- .mr[2] = 0x6,
- .mr[3] = 0x1
- },
- .noc_timing = 0x20D266A4,
- .noc_activate = 0x5B6,
- .ddrconfig = 14,
- .ddr_freq = 533*MHz,
- .dramtype = LPDDR3,
- .num_channels = 2,
- .stride = 9,
- .odt = 0,
-},
diff --git a/src/mainboard/google/veyron_mighty/sdram_inf/sdram-lpddr3-hynix-4GB.inc b/src/mainboard/google/veyron_mighty/sdram_inf/sdram-lpddr3-hynix-4GB.inc
deleted file mode 100644
index a48ac42a0e..0000000000
--- a/src/mainboard/google/veyron_mighty/sdram_inf/sdram-lpddr3-hynix-4GB.inc
+++ /dev/null
@@ -1,77 +0,0 @@
-{
- {
- {
- .rank = 0x2,
- .col = 0xA,
- .bk = 0x3,
- .bw = 0x2,
- .dbw = 0x2,
- .row_3_4 = 0x0,
- .cs0_row = 0xF,
- .cs1_row = 0xF
- },
- {
- .rank = 0x2,
- .col = 0xA,
- .bk = 0x3,
- .bw = 0x2,
- .dbw = 0x2,
- .row_3_4 = 0x0,
- .cs0_row = 0xF,
- .cs1_row = 0xF
- }
- },
- {
- .togcnt1u = 0x215,
- .tinit = 0xC8,
- .trsth = 0x0,
- .togcnt100n = 0x35,
- .trefi = 0x26,
- .tmrd = 0x2,
- .trfc = 0x70,
- .trp = 0x2000D,
- .trtw = 0x6,
- .tal = 0x0,
- .tcl = 0x8,
- .tcwl = 0x4,
- .tras = 0x17,
- .trc = 0x24,
- .trcd = 0xD,
- .trrd = 0x6,
- .trtp = 0x4,
- .twr = 0x8,
- .twtr = 0x4,
- .texsr = 0x76,
- .txp = 0x4,
- .txpdll = 0x0,
- .tzqcs = 0x30,
- .tzqcsi = 0x0,
- .tdqs = 0x1,
- .tcksre = 0x2,
- .tcksrx = 0x2,
- .tcke = 0x4,
- .tmod = 0x0,
- .trstl = 0x0,
- .tzqcl = 0xC0,
- .tmrr = 0x4,
- .tckesr = 0x8,
- .tdpd = 0x1F4
- },
- {
- .dtpr0 = 0x48D7DD93,
- .dtpr1 = 0x187008D8,
- .dtpr2 = 0x121076,
- .mr[0] = 0x0,
- .mr[1] = 0xC3,
- .mr[2] = 0x6,
- .mr[3] = 0x1
- },
- .noc_timing = 0x20D266A4,
- .noc_activate = 0x5B6,
- .ddrconfig = 3,
- .ddr_freq = 533*MHz,
- .dramtype = LPDDR3,
- .num_channels = 2,
- .stride = 13,
- .odt = 0,
-},
diff --git a/src/mainboard/google/veyron_mighty/sdram_inf/sdram-lpddr3-samsung-2GB.inc b/src/mainboard/google/veyron_mighty/sdram_inf/sdram-lpddr3-samsung-2GB.inc
deleted file mode 100644
index 0f15ba5074..0000000000
--- a/src/mainboard/google/veyron_mighty/sdram_inf/sdram-lpddr3-samsung-2GB.inc
+++ /dev/null
@@ -1,78 +0,0 @@
-{
- /* two Samsung K4E8E304ED-EGCE000 chips */
- {
- {
- .rank = 0x2,
- .col = 0xA,
- .bk = 0x3,
- .bw = 0x2,
- .dbw = 0x2,
- .row_3_4 = 0x0,
- .cs0_row = 0xE,
- .cs1_row = 0xE
- },
- {
- .rank = 0x2,
- .col = 0xA,
- .bk = 0x3,
- .bw = 0x2,
- .dbw = 0x2,
- .row_3_4 = 0x0,
- .cs0_row = 0xE,
- .cs1_row = 0xE
- }
- },
- {
- .togcnt1u = 0x215,
- .tinit = 0xC8,
- .trsth = 0x0,
- .togcnt100n = 0x35,
- .trefi = 0x26,
- .tmrd = 0x2,
- .trfc = 0x70,
- .trp = 0x2000D,
- .trtw = 0x6,
- .tal = 0x0,
- .tcl = 0x8,
- .tcwl = 0x4,
- .tras = 0x17,
- .trc = 0x24,
- .trcd = 0xD,
- .trrd = 0x6,
- .trtp = 0x4,
- .twr = 0x8,
- .twtr = 0x4,
- .texsr = 0x76,
- .txp = 0x4,
- .txpdll = 0x0,
- .tzqcs = 0x30,
- .tzqcsi = 0x0,
- .tdqs = 0x1,
- .tcksre = 0x2,
- .tcksrx = 0x2,
- .tcke = 0x4,
- .tmod = 0x0,
- .trstl = 0x0,
- .tzqcl = 0xC0,
- .tmrr = 0x4,
- .tckesr = 0x8,
- .tdpd = 0x1F4
- },
- {
- .dtpr0 = 0x48D7DD93,
- .dtpr1 = 0x187008D8,
- .dtpr2 = 0x121076,
- .mr[0] = 0x0,
- .mr[1] = 0xC3,
- .mr[2] = 0x6,
- .mr[3] = 0x1
- },
- .noc_timing = 0x20D266A4,
- .noc_activate = 0x5B6,
- .ddrconfig = 2,
- .ddr_freq = 533*MHz,
- .dramtype = LPDDR3,
- .num_channels = 2,
- .stride = 9,
- .odt = 0,
-},
diff --git a/src/mainboard/google/veyron_mighty/sdram_inf/sdram-lpddr3-samsung-4GB.inc b/src/mainboard/google/veyron_mighty/sdram_inf/sdram-lpddr3-samsung-4GB.inc
deleted file mode 100644
index 09d260bc23..0000000000
--- a/src/mainboard/google/veyron_mighty/sdram_inf/sdram-lpddr3-samsung-4GB.inc
+++ /dev/null
@@ -1,77 +0,0 @@
-{
- {
- {
- .rank = 0x2,
- .col = 0xB,
- .bk = 0x3,
- .bw = 0x2,
- .dbw = 0x1,
- .row_3_4 = 0x0,
- .cs0_row = 0xE,
- .cs1_row = 0xE
- },
- {
- .rank = 0x2,
- .col = 0xB,
- .bk = 0x3,
- .bw = 0x2,
- .dbw = 0x1,
- .row_3_4 = 0x0,
- .cs0_row = 0xE,
- .cs1_row = 0xE
- }
- },
- {
- .togcnt1u = 0x215,
- .tinit = 0xC8,
- .trsth = 0x0,
- .togcnt100n = 0x35,
- .trefi = 0x26,
- .tmrd = 0x2,
- .trfc = 0x70,
- .trp = 0x2000D,
- .trtw = 0x6,
- .tal = 0x0,
- .tcl = 0x8,
- .tcwl = 0x4,
- .tras = 0x17,
- .trc = 0x24,
- .trcd = 0xD,
- .trrd = 0x6,
- .trtp = 0x4,
- .twr = 0x8,
- .twtr = 0x4,
- .texsr = 0x76,
- .txp = 0x4,
- .txpdll = 0x0,
- .tzqcs = 0x30,
- .tzqcsi = 0x0,
- .tdqs = 0x1,
- .tcksre = 0x2,
- .tcksrx = 0x2,
- .tcke = 0x4,
- .tmod = 0x0,
- .trstl = 0x0,
- .tzqcl = 0xC0,
- .tmrr = 0x4,
- .tckesr = 0x8,
- .tdpd = 0x1F4
- },
- {
- .dtpr0 = 0x48D7DD93,
- .dtpr1 = 0x187008D8,
- .dtpr2 = 0x121076,
- .mr[0] = 0x0,
- .mr[1] = 0xC3,
- .mr[2] = 0x6,
- .mr[3] = 0x1
- },
- .noc_timing = 0x20D266A4,
- .noc_activate = 0x5B6,
- .ddrconfig = 6,
- .ddr_freq = 533*MHz,
- .dramtype = LPDDR3,
- .num_channels = 2,
- .stride = 13,
- .odt = 0,
-},
diff --git a/src/mainboard/google/veyron_mighty/sdram_inf/sdram-unused.inc b/src/mainboard/google/veyron_mighty/sdram_inf/sdram-unused.inc
deleted file mode 100644
index 06498f7f14..0000000000
--- a/src/mainboard/google/veyron_mighty/sdram_inf/sdram-unused.inc
+++ /dev/null
@@ -1,3 +0,0 @@
-{
- .dramtype= UNUSED
-}, \ No newline at end of file
generated by cgit v1.2.3 (git 2.39.1) at 2024-07-16 08:49:44 +0000