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-rw-r--r--src/mainboard/google/veyron/Kconfig63
1 files changed, 0 insertions, 63 deletions
diff --git a/src/mainboard/google/veyron/Kconfig b/src/mainboard/google/veyron/Kconfig
deleted file mode 100644
index f54917ccfc..0000000000
--- a/src/mainboard/google/veyron/Kconfig
+++ /dev/null
@@ -1,63 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright 2014 Rockchip Inc.
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
-##
-
-if BOARD_GOOGLE_VEYRON
-
-config BOARD_SPECIFIC_OPTIONS # dummy
- def_bool y
- select CHROMEOS
- select EC_GOOGLE_CHROMEEC
- select EC_GOOGLE_CHROMEEC_SPI
- select SOC_ROCKCHIP_RK3288
- select MAINBOARD_DO_NATIVE_VGA_INIT
- select BOARD_ROMSIZE_KB_4096
-
-config MAINBOARD_DIR
- string
- default google/veyron
-
-config MAINBOARD_PART_NUMBER
- string
- default "Veyron"
-
-config MAINBOARD_VENDOR
- string
- default "Google"
-
-config EC_GOOGLE_CHROMEEC_SPI_BUS
- hex
- default 0
-
-config BOOT_MEDIA_SPI_BUS
- int
- default 2
-
-config DRAM_DMA_START
- hex
- default 0x10000000
-
-config DRAM_DMA_SIZE
- hex
- default 0x00200000
-
-config DRAM_SIZE_MB
- int
- default 2048
-
-endif # BOARD_GOOGLE_VEYRON