diff options
Diffstat (limited to 'src/mainboard/google/sarien/variants/arcada/devicetree.cb')
-rw-r--r-- | src/mainboard/google/sarien/variants/arcada/devicetree.cb | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/src/mainboard/google/sarien/variants/arcada/devicetree.cb b/src/mainboard/google/sarien/variants/arcada/devicetree.cb index 939acd2625..e3b9680db8 100644 --- a/src/mainboard/google/sarien/variants/arcada/devicetree.cb +++ b/src/mainboard/google/sarien/variants/arcada/devicetree.cb @@ -8,6 +8,11 @@ chip soc/intel/cannonlake register "gpe0_dw1" = "PMC_GPP_C" register "gpe0_dw2" = "PMC_GPP_D" + # EC host command ranges + register "gen1_dec" = "0x00040931" # 0x930-0x937 + register "gen2_dec" = "0x00040941" # 0x940-0x947 + register "gen3_dec" = "0x000c0951" # 0x950-0x95f + # FSP configuration register "SaGv" = "3" register "HeciEnabled" = "1" @@ -152,7 +157,11 @@ chip soc/intel/cannonlake device pci 1e.1 off end # UART #1 device pci 1e.2 off end # GSPI #0 device pci 1e.3 off end # GSPI #1 - device pci 1f.0 on end # LPC/eSPI + device pci 1f.0 on + chip ec/google/wilco + device pnp 0c09.0 on end + end + end # LPC/eSPI device pci 1f.1 on end # P2SB device pci 1f.2 on end # Power Management Controller device pci 1f.3 on end # Intel HDA |