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-rw-r--r--src/mainboard/google/rex/variants/screebo/Makefile.inc1
-rw-r--r--src/mainboard/google/rex/variants/screebo/overridetree.cb8
-rw-r--r--src/mainboard/google/rex/variants/screebo/variant.c22
3 files changed, 31 insertions, 0 deletions
diff --git a/src/mainboard/google/rex/variants/screebo/Makefile.inc b/src/mainboard/google/rex/variants/screebo/Makefile.inc
index 228886c1bb..192041b425 100644
--- a/src/mainboard/google/rex/variants/screebo/Makefile.inc
+++ b/src/mainboard/google/rex/variants/screebo/Makefile.inc
@@ -3,3 +3,4 @@ bootblock-y += gpio.c
romstage-y += gpio.c
romstage-y += memory.c
ramstage-y += gpio.c
+ramstage-y += variant.c
diff --git a/src/mainboard/google/rex/variants/screebo/overridetree.cb b/src/mainboard/google/rex/variants/screebo/overridetree.cb
index ee59f6a342..691aafd9e9 100644
--- a/src/mainboard/google/rex/variants/screebo/overridetree.cb
+++ b/src/mainboard/google/rex/variants/screebo/overridetree.cb
@@ -1,3 +1,11 @@
+fw_config
+ field MB_CONFIG 5 7
+ option MB_UNKNOWN 0
+ option MB_TYPEC 1
+ option MB_TBT 2
+ end
+end
+
chip soc/intel/meteorlake
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC1)" # USB2_C1
diff --git a/src/mainboard/google/rex/variants/screebo/variant.c b/src/mainboard/google/rex/variants/screebo/variant.c
new file mode 100644
index 0000000000..4044fd4025
--- /dev/null
+++ b/src/mainboard/google/rex/variants/screebo/variant.c
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <chip.h>
+#include <fw_config.h>
+#include <baseboard/variants.h>
+
+void variant_update_soc_chip_config(struct soc_intel_meteorlake_config *config)
+{
+ /* SOC Aux orientation override:
+ * This is a bitfield that corresponds to up to 4 TCSS ports.
+ * Bits (0,1) allocated for TCSS Port1 configuration and Bits (2,3)for TCSS Port2.
+ * TcssAuxOri = 0101b
+ * Bit0,Bit2 set to "1" indicates no retimer on USBC Ports
+ * Bit1,Bit3 set to "0" indicates Aux lines are not swapped on the
+ * motherboard to USBC connector
+ */
+ if (fw_config_probe(FW_CONFIG(MB_CONFIG, MB_TYPEC))) {
+ config->typec_aux_bias_pads[1].pad_auxp_dc = GPP_C16;
+ config->typec_aux_bias_pads[1].pad_auxn_dc = GPP_C17;
+ config->tcss_aux_ori = 0x04;
+ }
+}