diff options
Diffstat (limited to 'src/mainboard/google/poppy/variants/rammus')
| -rw-r--r-- | src/mainboard/google/poppy/variants/rammus/devicetree.cb | 19 |
1 files changed, 6 insertions, 13 deletions
diff --git a/src/mainboard/google/poppy/variants/rammus/devicetree.cb b/src/mainboard/google/poppy/variants/rammus/devicetree.cb index fa5753773b..8c8eb7f046 100644 --- a/src/mainboard/google/poppy/variants/rammus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/rammus/devicetree.cb @@ -118,19 +118,6 @@ chip soc/intel/skylake .dc_loadline = 430, }" - # Enable Root port 1. - register "PcieRpEnable[0]" = "1" - # Enable CLKREQ# - register "PcieRpClkReqSupport[0]" = "1" - # RP 1 uses SRCCLKREQ1# - register "PcieRpClkReqNumber[0]" = "1" - # RP 1 uses CLK SRC 1 - register "PcieRpClkSrcNumber[0]" = "1" - # RP 1, Enable Advanced Error Reporting - register "PcieRpAdvancedErrorReporting[0]" = "1" - # RP 1, Enable Latency Tolerance Reporting Mechanism - register "PcieRpLtrEnable[0]" = "1" - # Intel Common SoC Config #+-------------------+---------------------------+ #| Field | Value | @@ -339,6 +326,12 @@ chip soc/intel/skylake end device ref i2c4 off end device ref pcie_rp1 on + register "PcieRpEnable[0]" = "1" + register "PcieRpClkReqSupport[0]" = "1" + register "PcieRpClkReqNumber[0]" = "1" + register "PcieRpClkSrcNumber[0]" = "1" + register "PcieRpAdvancedErrorReporting[0]" = "1" + register "PcieRpLtrEnable[0]" = "1" chip drivers/wifi/generic register "wake" = "GPE0_DW0_00" # GPP_B0 device pci 00.0 on end |