diff options
Diffstat (limited to 'src/mainboard/google/nyan/devicetree.cb')
| -rw-r--r-- | src/mainboard/google/nyan/devicetree.cb | 32 |
1 files changed, 21 insertions, 11 deletions
diff --git a/src/mainboard/google/nyan/devicetree.cb b/src/mainboard/google/nyan/devicetree.cb index 623c5a196c..58945568e9 100644 --- a/src/mainboard/google/nyan/devicetree.cb +++ b/src/mainboard/google/nyan/devicetree.cb @@ -26,9 +26,11 @@ chip soc/nvidia/tegra124 # are no single-access resources such as the infamous # cf8/cfc registers found on PCs. register "display_controller" = "TEGRA_ARM_DISPLAYA" - register "xres" = "2560" - register "yres" = "1700" - register "framebuffer_bits_per_pixel" = "24" + register "xres" = "1366" + register "yres" = "768" + # this setting is what nvidia does; it makes no sense + # and does not agree with hardware. Why'd they do it? + register "framebuffer_bits_per_pixel" = "18" register "cache_policy" = "DCACHE_WRITETHROUGH" # With some help from the mainbaord designer @@ -57,14 +59,22 @@ chip soc/nvidia/tegra124 #V sync = 1713 - 1703 = 10 #V back porch = 1749 - 1713 = 36 #href_to_sync and vref_to_sync are from the vendor - - register "href_to_sync" = "11" - register "hfront_porch" = "48" - register "hsync_width" = "32" - register "hback_porch" = "80" +#this is just an example for a Pixel panel; other panels differ. +# Here is a peppy panel: +# 1366x768 (0x45) 76.4MHz -HSync -VSync *current +preferred +# h: width 1366 start 1502 end 1532 total 1592 +# v: height 768 start 776 end 788 total 800 +# These numbers were provided by Nvidia. + register "href_to_sync" = "1" + register "hfront_porch" = "44" + register "hsync_width" = "46" + register "hback_porch" = "44" register "vref_to_sync" = "1" - register "vfront_porch" = "3" - register "vsync_width" = "10" - register "vback_porch" = "36" + register "vfront_porch" = "6" + register "vsync_width" = "8" + register "vback_porch" = "6" + + # we *know* the pixel clock for this system. + register "pixel_clock" = "71" end |