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Diffstat (limited to 'src/mainboard/google/guybrush/variants/dewatt/overridetree.cb')
-rw-r--r--src/mainboard/google/guybrush/variants/dewatt/overridetree.cb16
1 files changed, 15 insertions, 1 deletions
diff --git a/src/mainboard/google/guybrush/variants/dewatt/overridetree.cb b/src/mainboard/google/guybrush/variants/dewatt/overridetree.cb
index 9a9e760de6..e14ae4a575 100644
--- a/src/mainboard/google/guybrush/variants/dewatt/overridetree.cb
+++ b/src/mainboard/google/guybrush/variants/dewatt/overridetree.cb
@@ -18,7 +18,7 @@ chip soc/amd/cezanne
register "telemetry_vddcrsocfull_scale_current_mA" = "31481" #mA
register "telemetry_vddcrsocoffset" = "193"
- #USB 2.0 phy config
+ #USB 2/3 phy config
register "usb_phy" = "{
/* Left USB C0 Port */
.Usb2PhyPort[0] = {
@@ -56,6 +56,20 @@ chip soc/amd/cezanne
.txhsxvtune = 3,
.txrestune = 1,
},
+ /* Left USB C0 Port */
+ .Usb3PhyPort[0] = {
+ .tx_term_ctrl=3,
+ .rx_term_ctrl=3,
+ .tx_vboost_lvl_en=1,
+ .tx_vboost_lvl=5,
+ },
+ /* Left USB A0 Port */
+ .Usb3PhyPort[1] = {
+ .tx_term_ctrl=3,
+ .rx_term_ctrl=3,
+ .tx_vboost_lvl_en=1,
+ .tx_vboost_lvl=5,
+ },
}"
# general purpose PCIe clock output configuration