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-rw-r--r--src/mainboard/google/dedede/variants/baseboard/devicetree.cb3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
index 9064297c74..cb5321c773 100644
--- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
@@ -206,6 +206,9 @@ chip soc/intel/jasperlake
# Enable HECI
register "HeciEnabled" = "1"
+ # Set xHCI LFPS period sampling off time, the default is 9ms.
+ register "xhci_lfps_sampling_offtime_ms" = "9"
+
device domain 0 on
device pci 00.0 on end # Host Bridge
device pci 02.0 on end # Integrated Graphics Device