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-rw-r--r--src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb
index 74b24c8581..91c633a3fa 100644
--- a/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb
+++ b/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb
@@ -17,6 +17,9 @@ chip soc/intel/alderlake
# Enable CNVi BT
register "CnviBtCore" = "true"
+ # eMMC HS400
+ register "emmc_enable_hs400_mode" = "1"
+
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C0
register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C1
register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # USB2_A0